R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 486

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ADBGV#RD0Z

Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ADBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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R8A77850ADBGV#RD0Z
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11. Local Bus State Controller (LBSC)
Table 11.20 Register Settings for Divided-Up DACKn Output in DMA1 Transfer Using the
Notes: "⎯" means an arbitrary setting value. When transfer is done in a single bus cycle, DACKn
Rev.1.00 Jan. 10, 2008 Page 454 of 1658
REJ09B0261-0100
Bus Width
[Bit]
8
16
1. Multiple bus cycles are generated, however, DACKn cannot be divided.
2. Can be divided only in longword units.
is not divided up because DACKn is output once in DMA1 transfer.
Access Size
Byte
Word
Longword
16 bytes
32 bytes
Byte
Word
Longword
16 bytes
32 bytes
PCMCIA Interface
Bus Cycle Number
1
2
4
16
32
1
1
2
8
16
Not Divided
IWRRD, IWRRS, or
IWW in CSnBCR
B'000
B'000
Divided
IWRRD, IWRRS, or
IWW in CSnBCR
Undividable
Undividable∗
Undividable∗
B'111 to B'001∗
Undividable∗
Undividable
Undividable
Undividable∗
B'111 to B'001∗
Undividable∗
1
1
1
1
1
2
2

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