ADSP-21161NKCAZ100 Analog Devices Inc, ADSP-21161NKCAZ100 Datasheet - Page 22

• Manufacturer Part Number: ADSP-21161NKCAZ100
• Description: IC,DSP,32-BIT,CMOS,BGA,225PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-21161NKCAZ100

• Rohs Compliant: YES
• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 100MHz
• Non-volatile Memory: External
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.80V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 225-MBGA, 225-Mini-BGA
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Format: Floating Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 128KB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (min): 1.71/3.13V
• Operating Supply Voltage (max): 1.89/3.47V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADSP21161NKCAZ100

ADSP-21161N
Table 8. Operation Types Versus Input Current
1
2
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
and is calculated by:
The load capacitance should include the processor package
capacitance (C
load high and then back low. At a maximum rate of 1/t
address and data pins can drive high and low, while writing to a
SDRAM memory.
Example: Estimate P
Table 9. External Power Calculations—110 MHz Instruction Rate
P
Operation
Instruction Type
Instruction Fetch
Core Memory Access
Internal Memory DMA
External Memory DMA
Data bit pattern for core
memory access and DMA
Pin Type
Address
MSx
SDWE
Data
SDCLK0
The state of the PEYEN bit (SIMD versus SISD mode) does not influence these calculations.
These assume a 2:1 core clock ratio. For more information on ratios and clocks (t
EXT
• The number of output pins that switch during each cycle
• The maximum frequency at which they can switch (f)
• Their load capacitance (C)
• Their voltage swing (V
• A system with one bank of external memory (32 bit)
• Two 1M
• External Data Memory writes can occur every cycle at a
(O)
10 pF (ignoring trace capacitance)
rate of 1/t
=
O C
CK
IN
). The switching frequency includes driving the
16 SDRAM chips are used, each with a load of
with 50% of the pins switching
Number of Pins
11
4
1
32
1
V
EXT
DD
2
with the following assumptions:
2
DD
f
)
Peak Activity
Multifunction
Cache
2 per t
1 per 2 t
1 per external port cycle ( 32)
Worst case
CK
CCLK
cycle (DM 64 and PM 64)
cycles
% Switching
20
0
0
50
100
1
(I
DDINPEAK
Rev. B | Page 22 of 60 | November 2009
CK
)
,
24.7 pF
24.7 pF
24.7 pF
14.7 pF
24.7 pF
CK
and t
C
CCLK
The P
drive, as shown in
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
Where:
P
P
Dissipation on Page
P
cal Characteristics
Note that the conditions causing a worst-case P
from those causing a worst-case P
occur while 100% of the output pins are switching from all ones
to all zeros. Note also that it is not common for an application to
have 100% or even 50% of the outputs switching
simultaneously.
P
), see the timing ratio definitions
EXT
INT
PLL
TOTAL
High Activity
Multifunction
Internal Memory
1 per t
1 per 2 t
1 per external port cycle ( 32)
Random
• The bus cycle time is 55 MHz
• The external SDRAM clock rate is 110 MHz
• Ignoring SDRAM refresh cycles
• Addresses are incremental and on the same page
is AI
is I
is from
EXT
DDINT
CK
55 MHz
N/A
N/A
55 MHz
110 MHz
DD
equation is calculated for each class of pins that can
CCLK
cycle (DM 64)
=
f
× 1.8 V, using the value for AI
Table
× 1.8 V, using the calculation I
cycles
P
EXT
1
(I
DDINHIGH
Table
9.
on Page
21.
+
P
INT
9.
)
10.9 V
10.9 V
10.9 V
10.9 V
10.9 V
19.
on Page
V
+
DD
P
2
PLL
INT
20.
. Maximum P
Low Activity
Single Function
Internal Memory
None
N/A
N/A
N/A
P
EXT
= P
= 0.033 W
= 0.000 W
= 0.000 W
= 0.141 W
= 0.030 W
DD
= 0.204 W
DDINT
listed in the Electri-
EXT
EXT
listed in
INT
1
are different
(I
cannot
DDINLOW
Power
)