ADSP-21161NKCAZ100 Analog Devices Inc, ADSP-21161NKCAZ100 Datasheet - Page 56

• Manufacturer Part Number: ADSP-21161NKCAZ100
• Description: IC,DSP,32-BIT,CMOS,BGA,225PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-21161NKCAZ100

• Rohs Compliant: YES
• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 100MHz
• Non-volatile Memory: External
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.80V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 225-MBGA, 225-Mini-BGA
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Format: Floating Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 128KB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (min): 1.71/3.13V
• Operating Supply Voltage (max): 1.89/3.47V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADSP21161NKCAZ100

ADSP-21161N
Figure 42. Typical Output Delay or Hold vs. Load Capacitance (at Max Case
Figure 43. Typical Output Rise/Fall Time (20% – 80%, V
Figure 44. Typical Output Rise/Fall Time (20% – 80%, V
NOMINAL
16.0
14.0
12.0
10.0
16.0
14.0
12.0
10.0
8.0
6.0
4.0
2.0
8.0
6.0
4.0
2.0
–5
0
25
20
15
10
0
5
0
0
0
20
20
30
40
40
Y = 0.0835X - 2.42
Y = 0.0773X + 1.4399
LOAD CAPACITANCE – pF
60
Y = 0.0743X + 1.5613
60
60
LOAD CAPACITANCE – pF
LOAD CAPACITANCE – pF
Temperature)
80
RISE TIME
RISE TIME
80
90
100
Y = 0.0417X + 1.8674
100
Y = 0.0414X + 2.0128
120
120
FALL TIME
120
FALL TIME
140
140
150
160
160
DDEXT
DDEXT
Rev. B | Page 56 of 60 | November 2009
180
180
180
= Max)
= Min)
200
210
200
Capacitive Loading
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see
graphically how output delays and holds vary with load capaci-
tance. (Note that this graph or derating does not apply to output
disable delays; see
of
the ranges shown for Typical Output Delay vs. Load Capaci-
tance and Typical Output Rise Time (20% – 80%, V = Min) vs.
Load Capacitance.
ENVIRONMENTAL CONDITIONS
The thermal characteristics in which the DSP is operating influ-
ence performance.
Thermal Characteristics
The ADSP-21161N is packaged in a 225-ball chip scale package
ball grid array (CSP_BGA). The ADSP-21161N is specified for a
case temperature (T
specification is not exceeded, a heatsink and/or an air flow
source may be used. Use the center block of ground pins
(CSP_BGA balls: F6-10, G6-10, H6-10, J6-10, K6-10) to provide
thermal pathways to the printed circuit board’s ground plane. A
heatsink should be attached to the ground plane (as close as pos-
sible to the thermal pathways) with a thermal adhesive.
where:
Table 39. Airflow Over Package Versus
1
Airflow (Linear Ft./Min.)
= 6.8°C/W.
CA
• T
• PD = Power dissipation in W (this value depends upon the
•
•
Figure
(°C/W)
of package)
specific application; a method for calculating PD is shown
under Power Dissipation).
CA
JB
CASE
= 8.0°C/W
= Value from
42,
= Case temperature (measured on top surface
JC
Figure
1
T
CASE
Output Disable Time on Page
CASE
43, and
Figure 40 on Page
Table
). To ensure that the T
=
T
Figure 44
AMB
39.
+
0
17.9
PD
may not be linear outside
55).
CA
Figure 42
CA
200
15.2
CASE
55.) The graphs
data sheet
shows
400
13.7