ADSP-21160NCB-100 Analog Devices Inc, ADSP-21160NCB-100 Datasheet - Page 41

IC,DSP,32-BIT,CMOS,BGA,400PIN,PLASTIC

ADSP-21160NCB-100

Manufacturer Part Number
ADSP-21160NCB-100
Description
IC,DSP,32-BIT,CMOS,BGA,400PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr

Specifications of ADSP-21160NCB-100

Rohs Status
RoHS non-compliant
Interface
Host Interface, Link Port, Serial Port
Clock Rate
100MHz
Non-volatile Memory
External
On-chip Ram
512kB
Voltage - I/o
3.30V
Voltage - Core
1.90V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
400-BGA
Package
400BGA
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
100 MHz
Ram Size
512 KB
Device Million Instructions Per Second
100 MIPS
Lead Free Status / RoHS Status

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21160NCB-100
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADSP-21160NCB-100
Manufacturer:
ADI
Quantity:
2 186
where:
Table 30. External Power Calculations (3.3 V Device)
Test Conditions
The test conditions for timing parameters appearing in ADSP-
21160N specifications
output enable time, and capacitive loading.
Output Disable Time
Output pins are considered to be disabled when they stop driving,
go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by V is dependent on the capacitive load, C
load current, I
following equation:
The output disable time t
and t
interval from when the reference signal switches to when the
output voltage decays V from the measured output high or
output low voltage. t
and with V equal to 0.5 V.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to when they start
driving. The output enable time t
reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram
pins (such as the data bus) are enabled, the measurement value
is that of the first pin to start driving.
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
to be the difference between the ADSP-21160N’s output voltage
and the input threshold for the device requiring the hold time. A
typical V will be 0.4 V. C
line), and I
line). The hold time will be t
(i.e., t
REV. 0
Pin Type
Address
MS0
WRx
Data
CLKOUT
P
P
Power Dissipation
P
ABSOLUTE MAXIMUM RATINGS
EXT
INT
PLL
DECAY
DATRWH
is I
is AI
is from
DDINT
as shown in
L
DD
is the total leakage or three-state current (per data
for the write cycle).
L
DECAY
. This decay time can be approximated by the
× 1.9 V, using the value for AI
Table 30
× 1.9 V, using the calculation I
No. of Pins
15
1
2
64
1
using the equation given above. Choose V
DECAY
t
DECAY
Figure
on Page 40
on Page 14
DIS
is calculated with test loads C
L
is the total bus capacitance (per data
= (C
DECAY
is the difference between t
28. The time t
L
plus the minimum disable time
ENA
include output disable time,
V)/I
is the interval from when a
% Switching
50
0
50
(Figure
L
MEASURED
on Page 15
28). If multiple
DD
DDINT
listed in
is the
L
listed in
MEASURED
L
and the
and I
× C
× 44.7 pF
× 44.7 pF
× 44.7 pF
× 14.7 pF
× 4.7 pF
L
,
–41–
Note that the conditions causing a worst-case P
from those causing a worst-case P
occur while 100% of the output pins are switching from all ones
to all zeros. Note also that it is not common for an application to
have 100% or even 50% of the outputs switching simultaneously.
Figure 30. Voltage Reference Levels for AC Measurements
(Except Output Enable/Disable)
REFERENCE
SIGNAL
V
V
OH
OL
OUTPUT
(MEASURED)
(MEASURED)
Figure 29. Equivalent Device Loading for AC
Measurements (Includes All Fixtures)
× f
× 24 MHz
× 24 MHz
× 24 MHz
× 24 MHz
× 48 MHz
PIN
TO
OUTPUT
INPUT
OR
Figure 28. Output Enable/Disable
t
DIS
OUTPUT STOPS
DRIVING
1.5V
t
MEASURED
TEST CONDITIONS CAUSE THIS VOLTAGE
× V
× 10.9 V
× 10.9 V
× 10.9 V
× 10.9 V
× 10.9 V
V
V
30pF
OH
OL
t
DECAY
DD
TO BE APPROXIMATELY 1.5V
(MEASURED) – V
(MEASURED) + V
HIGH IMPEDANCE STATE.
2
INT
ADSP-21160N
. Maximum P
50
P
1.5V
EXT
OUTPUT STARTS
t
1.0V
ENA
2.0V
= P
= 0.088 W
= 0.000 W
= 0.023 W
= 0.123 W
= 0.003 W
= 0.237 W
DRIVING
EXT
EXT
INT
are different
1.5V
cannot

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