EP4CE55F23C9LN Altera, EP4CE55F23C9LN Datasheet - Page 216

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EP4CE55F23C9LN

Manufacturer Part Number
EP4CE55F23C9LN
Description
IC CYCLONE IV FPGA 55K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er

Specifications of EP4CE55F23C9LN

Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2340000
Number Of I /o
324
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
8–50
Figure 8–26. JTAG Configuration of Multiple Devices Using a Download Cable (1.2, 1.5, and 1.8-V V
Pins)
Notes to
(1) Connect these pull-up resistors to the V
(2) Connect the nCONFIG and MSEL pins to support a non-JTAG configuration scheme. If you only use a JTAG configuration, connect the nCONFIG
(3) In the USB-Blaster and ByteBlaster II cable, this pin is connected to nCE when it is used for AS programming, otherwise it is a no connect.
(4) You must connect the nCE pin to GND or driven low for successful JTAG configuration.
(5) Power up the V
(6) Resistor value can vary from 1 k to 10 k..
Cyclone IV Device Handbook, Volume 1
Pin 1
10-Pin Male Header
Download Cable
pin to logic-high and the MSEL pins to GND. In addition, pull DCLK and DATA[0] to either high or low, whichever is convenient on your board.
target supply voltage of 1.2 V. For the target supply voltage value, refer to the
Download Cable User
V
Figure
CCIO
(5)
VIO
V
(3)
(6)
8–26:
CCIO
1 kΩ
1
CC
V
CCIO
(1)
of the ByteBlaster II or USB-Blaster cable with supply from V
(6)
Guide.
If a non-Cyclone IV device is cascaded in the JTAG-chain, TDO of the non-Cyclone IV
device driving into TDI of the Cyclone IV device must fit the maximum overshoot
outlined in
The CONF_DONE and nSTATUS signals are shared in multi-device AS, AP, PS, and FPP
configuration chains to ensure that the devices enter user mode at the same time after
configuration is complete. When the CONF_DONE and nSTATUS signals are shared
among all the devices, you must configure every device when JTAG configuration is
performed.
If you only use JTAG configuration, Altera recommends that you connect the circuitry
as shown in
nSTATUS signals are isolated so that each device can enter user mode individually.
After the first device completes configuration in a multi-device configuration chain,
its nCEO pin drives low to activate the nCE pin of the second device, which prompts
the second device to begin configuration. Therefore, if these devices are also in a JTAG
chain, ensure that the nCE pins are connected to GND during JTAG configuration or
that the devices are JTAG configured in the same order as the configuration chain. As
long as the devices are JTAG configured in the same order as the multi-device
configuration chain, the nCEO of the previous device drives the nCE pin of the next
device low when it has successfully been JTAG configured. You can place other Altera
devices that have JTAG support in the same JTAG chain for device programming and
configuration.
(2)
(2)
(2)
(2)
(2)
V
CCIO
10 kΩ
nST A TUS
DATA[0]
DCLK
nCONFIG
nCEO
nCE (4)
TDI
MSEL[ ]
TMS
Cyclone IV Device
CCIO
Equation 8–1 on page
TCK
Figure 8–25
CONF_DONE
supply of the bank in which the pin resides.
TDO
V
CCIO
10 kΩ
(1)
or
Figure
Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
(2)
(2)
(2)
(2)
(2)
V
CCIO
10 kΩ
(1)
nST A TUS
DATA[0]
DCLK
nCONFIG
MSEL[ ]
nCE (4)
TDI
nCEO
8–5.
8–26, in which each of the CONF_DONE and
TMS
Cyclone IV Device
ByteBlaster II Download Cable User Guide
CCIO
TCK
CONF_DONE
. The ByteBlaster II and USB-Blaster cables do not support a
TDO
V
CCIO
10 kΩ
(1)
(2)
(2)
(2)
(2)
(2)
V
CCIO
© December 2010 Altera Corporation
10 kΩ
(1)
nST A TUS
DATA[0]
DCLK
nCONFIG
MSEL[ ]
nCEO
nCE (4)
TDI
TMS
Cyclone IV Device
CCIO
TCK
CONF_DONE
Powering the JTAG
and the
TDO
V
USB-Blaster
CCIO
Configuration
10 kΩ
(1)

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