EP4CE55F23C9LN Altera, EP4CE55F23C9LN Datasheet - Page 229

• Manufacturer Part Number: EP4CE55F23C9LN
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C9LN

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 0.97 V ~ 1.03 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
Table 8–17. Configuration Pin Summary for Cyclone IV E Devices (Part 2 of 2)
Table 8–18. Dedicated Configuration Pins on the Cyclone IV Device (Part 1 of 4)
© December 2010 Altera Corporation
Notes to
(1) To tri-state AS configuration pins in the AS configuration scheme, turn-on the Enable input tri-state on active configuration pins in user mode
(2) To tri-state AP configuration pins in the AP configuration scheme, turn-on the Enable input tri-state on active configuration pins in user mode
(3) The CRC_ERROR pin is not available in Cyclone IV E devices with 1.0-V core voltage.
(4) The CRC_ERROR pin is a dedicated output by default. Optionally, you can enable the CRC_ERROR pin as an open-drain output in the CRC
MSEL
nCONFIG
nSTATUS
Bank
5
Pin Name
option from the Device and Pin Options dialog box. This tri-states DCLK, nCSO, Data[0], and Data[1]/ASDO pins. Dual-purpose pins
settings for these pins are ignored. To set these pins to different settings, turn off the Enable input tri-state on active configuration pins in
user mode option and set the desired setting from the Dual-purpose Pins Setting menu.
option from the Device and Pin Options dialog box. This tri-states DCLK, Data[0..15], FLASH_nCE, and other AP pins. Dual-purpose
pins settings for these pins are ignored. To set these pins to different settings, turn off the Enable input tri-state on active configuration pins
in user mode option and set the desired setting from the Dual-purpose Pins Setting menu.
Error Detection tab of the Device and Pin Options dialog box.
Table
DEV_CLRn
8–17:
Description
Mode
User
N/A
N/A
N/A
Table 8–18
these pins on your board for successful configuration. You may not need some of
these pins for your configuration schemes.
Configuration
Scheme
describes the dedicated configuration pins. You must properly connect
All
All
All
Input/Output
Input
Bidirectional
open-drain
Pin Type
Input
Input
Dedicated
Configuration input that sets the Cyclone IV device configuration
scheme. You must hardwire these pins to V
MSEL pins have internal 9-k pull-down resistors that are
always active.
Configuration control input. Pulling this pin low with external
circuitry during user mode causes the Cyclone IV device to lose
its configuration data, enter a reset state, and tri-state all I/O
pins. Returning this pin to a logic-high level starts a
reconfiguration.
The Cyclone IV device drives nSTATUS low immediately after
power-up and releases it after the POR time.
■
■
Driving nSTATUS low after configuration and initialization does
not affect the configured device. If you use a configuration
device, driving nSTATUS low causes the configuration device
to attempt to configure the device, but because the device
ignores transitions on nSTATUS in user mode, the device does
not reconfigure. To start a reconfiguration, you must pull
nCONFIG low.
Status output—if an error occurs during configuration,
nSTATUS is pulled low by the target device.
Status input—if an external source (for example, another
Cyclone IV device) drives the nSTATUS pin low during
configuration or initialization, the target device enters an
error state.
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CCIO
Description
Cyclone IV Device Handbook, Volume 1
Configuration Mode
CCA
Optional, AP
or GND. The
8–63