IDT82V2108PXG IDT, Integrated Device Technology Inc, IDT82V2108PXG Datasheet - Page 116

• Manufacturer Part Number: IDT82V2108PXG
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PXG

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V2108PXG

IDT82V2108
Operation
Table 48: Initialization of RPLC (Continued)
Register
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
Value
2CH
2DH
00H
24H
00H
25H
00H
26H
00H
27H
00H
28H
00H
29H
00H
2AH
00H
2BH
00H
00H
00H
2EH
00H
2FH
00H
30H
00H
31H
00H
32H
00H
33H
00H
34H
00H
35H
00H
36H
00H
37H
00H
38H
00H
39H
00H
3AH
00H
106
(071H) register twice. If the SYNCV (b4, E1-071H) is logic 1 and the BEI
(b2, E1-071H) is logic 0, the pattern detector is in synchronization state.
then the configuration is shown in Table 49.
- Example For Testing E1 System Backplane Integrity
00CH) should be set to logic 1 and the other registers are set as above.
Then the PRGD can be used to test the system backplane integrity.
Table 48: Initialization of RPLC (Continued)
Table 49: Error Insertion
Then set the TEST in RPLC Payload Control register for TS2, TS4 and TS5.
The process is:
Then write 00H into the 07CH register to update the error counter registers.
Then read the registers from 07CH to 07FH to check the error numbers.
Register
After the above settings, read the PRGD Interrupt Enable/Status
Then insert errors into this link. Here suppose to insert 3 errors,
To test the E1 system backplane integrity, the RXPATGEN (b2, E1-
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
Register
Register
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
0DFH
0DEH
074H
074H
074H
074H
074H
074H
Value
80H
22H
80H
24H
80H
25H
Set the TEST in RPLC Payload Control
register for TS2.
Set the TEST in RPLC Payload Control
register for TS4.
Set the TEST in RPLC Payload Control
register for TS5.
T1 / E1 / J1 OCTAL FRAMER
Description
Value
Value
3BH
3CH
3DH
3EH
3FH
00H
00H
00H
00H
08H
00H
08H
00H
08H
00H
March 5, 2009