IDT82V2108PXG IDT, Integrated Device Technology Inc, IDT82V2108PXG Datasheet - Page 171

• Manufacturer Part Number: IDT82V2108PXG
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PXG

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V2108PXG

utive 512-bit stream, and set the AISD (b5, E1-037H) to logic 0 when 3 or more zeros are detected in each of 2 consecutive 512-bit stream.
EXCRCERR:
is not equal to the received CRC-4.
IDT82V2108
E1 FRMP Maintenance Mode Options (031H, 0B1H, 131H, 1B1H, 231H, 2B1H, 331H, 3B1H)
BIT2C:
secutive logic ‘0’s are received in Bit 2 of TS0 of NFAS or 3 consecutive FAS are in errors.
SMFASC:
been received in error.
been received in error or when all the content in TS16 of Frame 0 are logic ‘0’s for one or two consecutive multi-frames which is defined in the TS16C
(b4, E1-031H).
TS16C:
frames.
RAIC:
reception of any ‘A’ bit being logic zero.
(b7, E1-037H) to be logic 0 on the reception of any ‘A’ bit being logic zero.
AISC:
and set the AISD (b5, E1-037H) to logic 0 when 3 or more zeros are detected in a 512-bit stream.
Programming Information
Bit Name
Default
Bit No.
Type
= 0: Out of Basic frame synchronization is declared on 3 consecutive FAS errors.
= 1: Enable the additional criteria to declare out of Basic frame synchronization. Thus, out of Basic frame synchronization is declared when 3 con-
= 0: Enable the declaration of out of Signaling Multi-Frame synchronization when 2 consecutive Signaling Multi-Frame alignment patterns have
= 1: Enable the declaration of out of Signaling Multi-Frame synchronization when 2 consecutive Signaling Multi-Frame alignment patterns have
Valid when the SMFASC (b5, E1-031H) is logic 1.
= 0: Enable the declaration of out of Signaling Multi-Frame synchronization when all the content in TS16 are logic ‘0’s for one multi-frame.
= 1: Enable the declaration of out of Signaling Multi-Frame synchronization when all the content in TS16 are logic ‘0’s for two consecutive multi-
= 0: Set the RAIV (b7, E1-037H) to be logic 1 on the reception of any ‘A’ bit being logic one, and set the RAIV (b7, E1-037H) to be logic 0 on the
= 1: Set the RAIV (b7, E1-037H) to be logic 1 on the reception of the ‘A’ bit being logic one for 4 or more consecutive occasions, and set the RAIV
= 0: Set the AISD (b5, E1-037H) to logic 1 when it is out of Basic frame synchronization and less than 3 zeros are detected in a 512-bit stream,
= 1: Set the AISD (b5, E1-037H) to logic 1 when it is out of Basic frame synchronization and less than 3 zeros are detected in each of 2 consec-
The excessive CRC errors are defined as more than 914 CRC errors in one second. One CRC error is counted when the local calculated CRC-4
= 0: Normal operation.
= 1: Indicate that there are excessive CRC errors in the received data stream.
This bit is cleared to ‘0’ after it is read.
Reserved
7
BIT2C
R/W
6
1
SMFASC
R/W
5
0
TS16C
R/W
4
0
161
RAIC
R/W
3
0
Reserved
2
T1 / E1 / J1 OCTAL FRAMER
AISC
R/W
1
X
March 5, 2009
EXCRCERR
R
0
X