DSPIC33FJ128MC706-I/PT Microchip Technology Inc., DSPIC33FJ128MC706-I/PT Datasheet - Page 290

• Manufacturer Part Number: DSPIC33FJ128MC706-I/PT
• Description: 16 BIT MCU/DSP 64LD 40MIPS 128KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC33FJ128MC706-I/PT

• A/d Inputs: 16-Channels, 12-Bit
• Comparators: 8
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 53
• Interface: CAN/I2C/SPI/UART
• Ios: 53
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 16K Bytes
• Timers: 9-16-bit, 4-32-bit
• Voltage, Range: 3-3.6
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC33F
REGISTER 22-9:
REGISTER 22-10: ADxPCFGL: ADCx PORT CONFIGURATION REGISTER LOW
DS70165D-page 288
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
PCFG31
PCFG23
PCFG15
PCFG7
R/W-0
R/W-0
R/W-0
R/W-0
2:
2:
On devices without 32 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
ADC2 only supports analog inputs AN0-AN15; therefore, no ADC2 port Configuration register exists.
On devices without 16 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
On devices with two analog-to-digital modules, both AD1PCFGL and AD2PCFGL will affect the
configuration of port pins multiplexed with AN0-AN15.
PCFG<31:16>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
PCFG<15:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
PCFG30
PCFG22
PCFG14
PCFG6
R/W-0
R/W-0
R/W-0
R/W-0
AD1PCFGH: ADC1 PORT CONFIGURATION REGISTER HIGH
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG29
PCFG21
PCFG13
PCFG5
R/W-0
R/W-0
R/W-0
R/W-0
PCFG28
PCFG20
PCFG12
PCFG4
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG27
PCFG19
PCFG11
PCFG3
R/W-0
R/W-0
R/W-0
R/W-0
PCFG26
PCFG18
PCFG10
PCFG2
R/W-0
R/W-0
R/W-0
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
PCFG25
PCFG17
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
R/W-0
(1,2)
(1,2)
PCFG24
PCFG16
PCFG0
PCFG8
R/W-0
R/W-0
R/W-0
R/W-0
SS
SS
bit 8
bit 0
bit 8
bit 0