DSPIC33FJ128MC706-I/PT Microchip Technology Inc., DSPIC33FJ128MC706-I/PT Datasheet - Page 42

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DSPIC33FJ128MC706-I/PT

Manufacturer Part Number
DSPIC33FJ128MC706-I/PT
Description
16 BIT MCU/DSP 64LD 40MIPS 128KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC33FJ128MC706-I/PT

A/d Inputs
16-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
CAN/I2C/SPI/UART
Ios
53
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
128K Bytes
Ram Size
16K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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dsPIC33F
3.1.1
The
word-addressable blocks. Although it is treated as
24 bits wide, it is more appropriate to think of each
address of the program memory as a lower and upper
word, with the upper byte of the upper word being
unimplemented. The lower word always has an even
address, while the upper word has an odd address
(Figure 3-2).
Program memory addresses are always word-aligned
on the lower word, and addresses are incremented or
decremented by two during code execution. This
arrangement also provides compatibility with data
memory space addressing and makes it possible to
access data in the program memory space.
FIGURE 3-2:
DS70165D-page 40
program
0x000001
0x000003
0x000005
0x000007
Address
msw
PROGRAM MEMORY
ORGANIZATION
memory
Program Memory
PROGRAM MEMORY ORGANIZATION
‘Phantom’ Byte
(read as ‘0’)
00000000
00000000
00000000
00000000
space
most significant word
is
23
organized
Preliminary
in
16
Instruction Width
3.1.2
All dsPIC33F devices reserve the addresses between
0x00000 and 0x000200 for hard-coded program exe-
cution vectors. A hardware Reset vector is provided to
redirect code execution from the default value of the
PC on device Reset to the actual start of code. A GOTO
instruction is programmed by the user at 0x000000,
with the actual address for the start of code at
0x000002.
dsPIC33F devices also have two interrupt vector
tables, located from 0x000004 to 0x0000FF and
0x000100 to 0x0001FF. These vector tables allow
each of the many device interrupt sources to be han-
dled by separate Interrupt Service Routines (ISRs). A
more detailed discussion of the interrupt vector tables
is provided in Section 6.1 “Interrupt Vector Table”.
least significant word
8
INTERRUPT AND TRAP VECTORS
© 2006 Microchip Technology Inc.
0
(lsw Address)
PC Address
0x000000
0x000002
0x000004
0x000006

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