DS26324GNA3+ Maxim Integrated Products, DS26324GNA3+ Datasheet - Page 120

• Manufacturer Part Number: DS26324GNA3+
• Description: IC LIU E1/T1/J1 3.3V 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26324GNA3+

• Number Of Drivers/receivers: 16/16
• Protocol: LIN
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim
reserves the right to change the circuitry and specifications without notice at any time.
M a x i m I n t e g r a t e d P r o d u c t s , 1 2 0 S a n G a b r i e l D r iv e , S u n n y v a le , C A 9 4 0 8 6 4 0 8- 7 3 7 - 7 6 0 0
© 2011 Maxim Integrated Products
REVISION
053107
012108
DATE
3/11
Changed GMC to BGMC; changed bits 7, 6, and 5 from Reserved to BERTDIR,
BMCKS, and BTCKS.
In the GC register (LIUs 1–8), changed bit 7 from Reserved to RIMPMS and bit 2
from RTCTL to CRIMP (see also page 44, Table 6-5).
In the GC register (LIUs 9–16), changed bit 7 from Reserved to RIMPMS and
changed bit 2 from Reserved to CALEN (see also page 44, Table 6-5).
For TST, changed bits 7, 6, and 5 from Reserved to JABWS1, JABWS0, and
RHPMC.
In the bit 7 (RIMPON) description, changed GC.RTCTL to TST.RHPMC; added
note to bit description.
Changed bit description for OE bits 7 to 0.
For EZDE, corrected bit names for LIUs 1–16 from EXZDE[1:16] to EZDE[1:16];
changed bit description to say “Excessive zero detection is only relevant when
HDB3 or B8ZS decoding is enabled.” For CVDEB, changed bit description to say
“Code violation detection is only relevant when HDB3 decoding is enabled (LCS
register).”
Added note to bit 3 (RSMM1:RSSM4) description and updated descriptions for bits
6–4 and 2–0 (deleted “When” from each sentence for clarity).
Updated package drawing information.
In Table 12-1, deleted “Power Dissipation in Package”; added new Table 12-2.
Package Power Dissipation (for Thermal Considerations) and Table 12-3. Per-
Channel Power-Down Saving (for Thermal Considerations).
Table 8-3: added “Note 1: Specifications to -40°C are guaranteed by design (GBD)
and not production tested.”
Table 9-3, 9-4, 9-5, and 9-6: added “Note 1: The timing parameters in this table are
guaranteed by design (GBD).”
Changed the GC (2Fh) register bit 1 (JAPS) description.
Figure 10-1 in Section 10 PIN CONFIGURATION: Corrected cell R9. Changed
from DVSS to RESREF.
Pb-free ordering information added
Table 4-1. PIN DESCRIPTION. TRSTB Function description changed. Replaced
“floating” with “unconnected”
Section 8 DC ELECTRICAL CHARACTERIZATION: Soldering information in
ABSOLUTE MAXIMUM RATINGS table updated
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
DESCRIPTION
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