DS26324GNA3+ Maxim Integrated Products, DS26324GNA3+ Datasheet - Page 91

IC LIU E1/T1/J1 3.3V 256-CSBGA

DS26324GNA3+

Manufacturer Part Number
DS26324GNA3+
Description
IC LIU E1/T1/J1 3.3V 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26324GNA3+

Number Of Drivers/receivers
16/16
Protocol
LIN
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7 JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT
The DS26324 IEEE 1149.1 design supports the standard instruction codes SAMPLE/PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, and IDCODE. The DS26324 contains the
following as required by IEEE 1149.1 Standard Test-Access Port and Boundary-Scan Architecture:
Details on Boundary Scan Architecture and the Test Access Port can be found in IEEE 1149.1-1990, IEEE
1149.1a-1993, and IEEE 1149.1b-1994. The Test Access Port has the necessary interface pins: TRSTB, TCLK,
TMS,
go to
Figure 7-1. JTAG Functional Block Diagram
www.maxim-ic.com/tools/bsdl/
Test Access Port (TAP)
TAP Controller
Instruction Register
TDI,
and
10kΩ
TDO.
+V
TDI
See
10kΩ
+V
and search for DS26324.
the
TMS
pin
TEST ACCESS PORT
BOUNDARY SCAN
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
INDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
descriptions
BYPASS
TCLK
91 of 120
10kΩ
+V
TRSTB
for
SELECT
OUTPUT ENABLE
Bypass Register
Boundary Scan Register
Device Identification Register
details.
MUX
For
the
TDO
latest
BSDL
files

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