DS26324GNA3+ Maxim Integrated Products, DS26324GNA3+ Datasheet - Page 35

IC LIU E1/T1/J1 3.3V 256-CSBGA

DS26324GNA3+

Manufacturer Part Number
DS26324GNA3+
Description
IC LIU E1/T1/J1 3.3V 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26324GNA3+

Number Of Drivers/receivers
16/16
Protocol
LIN
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.9.2 Configuration and Monitoring
Set BTCR.BERTE = 1 to enable the BERT. The following tables show how to configure the on-board BERT to send
and receive common patterns.
Table 5-11. Pseudorandom Pattern Generation
2
2
(2047 type)
2
2
2
2
Table 5-12. Repetitive Pattern Generation
All Ones
All Zeros
Alternating Ones and Zeros
Double Alternating and Zeros
3 in 24
1 in 16
1 in 8
1 in 4
After configuring these bits, the pattern must be loaded into the BERT. This is accomplished via a zero-to-one
transition on BCR.TNPL and BCR.RNPL
Monitoring the BERT requires reading the
of Synchronization (OOS) bit. The BEC bit will be one when the bit error counter is one or more. The OOS will be
one when the receive pattern generator is not synchronized to the incoming pattern, which will occur when it
receives a minimum 6 bit errors within a 64-bit window. The Receive BERT Bit Count Register (RBCR) and the
Receive BERT Bit Error Count Register (RBECR) will be updated upon the reception of a Performance Monitor
Update signal (e.g., BCR.LPMU). This signal will update the registers with the values of the counters since the last
update and will reset the counters.
9
11
15
20
20
23
-1 O.153 (511 type)
-1 O.152 and O.153
-1 O.151
-1 O.153
-1 O.151 QRSS
-1 O.151
PATTERN TYPE
PATTERN TYPE
PTF[4:0]
(hex)
0D
04
08
10
02
11
PTF[4:0]
(hex)
NA
NA
NA
NA
NA
NA
NA
NA
BPCR
PLF[4:0]
(hex)
BSR
BPCR
0A
0E
08
13
13
16
REGISTER
PLF[4:0]
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
(hex)
register, which contains the Bit Error Count (BEC) bit and the Out
0F
00
00
01
03
17
07
03
REGISTER
35 of 120
PTS
0
0
0
0
0
0
PTS
1
1
1
1
1
1
1
1
QRSS
0
0
0
0
1
0
QRSS
0
0
0
0
0
0
0
0
0x0D0E
0x080A
0x0408
0x1013
0x0253
0x1116
BERT.
PCR
0x0020
0x0020
0x0021
0x0023
0x0037
0x002F
0x0027
0x0023
BERT.
PCR
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
BERT.
SPR2
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFF20
BERT.
SPR2
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
0xFFFF
BERT.
SPR1
0xFFFC
0xFFFF
0xFFFE
0xFFFE
0xFFF1
0xFF01
0x0022
0x0001
BERT.
SPR1
BERT.CR
TPIC,
RPIC
0
0
1
0
0
1

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