DS26324GNA3+ Maxim Integrated Products, DS26324GNA3+ Datasheet - Page 27

IC LIU E1/T1/J1 3.3V 256-CSBGA

DS26324GNA3+

Manufacturer Part Number
DS26324GNA3+
Description
IC LIU E1/T1/J1 3.3V 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26324GNA3+

Number Of Drivers/receivers
16/16
Protocol
LIN
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.4.7 Transmit All Ones
When Transmit All Ones is invoked, continuous ones are transmitted using MCLK as the timing reference. Data
input at TPOS and TNEG is ignored.
Transmit All Ones can be sent by setting bits in the
in
5.4.8 Driver Fail Monitor
The Driver Fail Monitor is connected to the TTIP and TRING pins. It will detect a short or open circuit on the
secondary side of the transmit transformer. The drive current will be limited to 50mA if a short circuit is detected.
The
failure.
5.5 Receiver
The DS26324’s 16 receivers are all identical. A 1:2 or 1:1 transformer can be used on the receive side (selected by
the RTR bit), but only a 1:1 transformer can be used if fully internal impedance match is enabled. Fully internal
receive impdeance match does not require the use of any external resistor on the receive line. If partially internal
impdeance matching is selected, the DS26334 will need only an external 120Ω resistor (30Ω for a 1:2 transformer)
for E1, T1, and J1. The receive impedance match settings are controlled by the transmit template/impedance
selection. See
enabled via the TS.RIMPON bit. Fully internal impedance matching is enabled by setting GC.RIMPMS and
TS.RIMPON.
The peak detector and data slicer process the received signal. The output of the data slicer goes to clock and data
recovery. A 2.048/1.544 PLL is internally multiplied by 16 via another internal PLL and fed to the clock recovery
system derives E1 or T1 clock. The clock recovery system uses the clock from the PLL circuit to form a 16 times
oversampler, which is used to recover the clock and data. This oversampling technique offers outstanding
performance to meet jitter tolerance specifications.
B8ZS/HDB3/AMI decoding is available when single-rail mode is selected. The selection of single-rail or dual rail is
done by settings in the
The receiver is capable of recovering signals up to 18dB worth of attenuation. The receiver contains functionality to
provide resistive gain up to 20dB for monitor mode.
Three receive termination modes are available:
5.5.1 Receiver Impedance Matching Calibration
In fully internal impedance matching mode, calibration of the internal resistors is necessary to match the line
impedance accurately. Calibration must be done upon power-up of the device. The resistance of the internal
resistors does vary across temperature. Therefore, it may be necessary to recalibrate if the ambient temperature
changes more than 30°C. The user may conclude that it is necessary to recalibrate on a periodic basis if he
expects such temperature swings. Calibration is not necessary for partially internal impedance match mode.
5.5.2 Receiver Monitor Mode
The receive equalizer is equipped with monitor mode function that allows for resistive gain up to 20dB, along with
cable attenuation of 6dB to 24dB as shown in the
ATAOS
1) External Impedance Matching. Internal impedance matching is disabled, external resistor should match
2) Partially Internal Impedance Matching. Internal impedance matching is enabled, in parallel with an
3) Fully Internal Impedance Matching. Internal impedance matching is enabled, no external termination
DFMS
line impedance.
external termination resistor (one value for all terminations).
necessary. This mode requires a 1:1 receive-side transformer.
are set and the corresponding receiver goes into LOS state in status register
status registers and the corresponding interrupt and enable registers can be used to monitor the driver
Figure 5-8
SRMS
and
register.
Table 5-5
for external component values. Partially internal impedance matching is
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
RSMM1–4
TAOE
27 of 120
Register. Also, Transmit All Ones will be enabled if bits
registers.
LOSS.

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