DS26324GNA3+ Maxim Integrated Products, DS26324GNA3+ Datasheet - Page 53

• Manufacturer Part Number: DS26324GNA3+
• Description: IC LIU E1/T1/J1 3.3V 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26324GNA3+

• Number Of Drivers/receivers: 16/16
• Protocol: LIN
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address (LIUs 1–8):
Bit #
Name
Default
Bit 7: BERT Direction Control Bit (BERTDIR). When this bit is set, the BERT for LIUs 1–8 will be enabled on the
system side of the part (BERT data will come out on RPOS/RNEG and be expected on TPOS/TNEG) for whichever
LIU the BERT is enabled.
Bit 6: BERT MCLK Selection (BMCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit will select MCLK as the BERT clock unless BTCKS is set. If neither BMCKS nor BTCKS is set, the BERT
will use the recovered clock.
Bit 5: BERT TCLK Selection (BTCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit selects TCLK as the BERT clock, regardless of the state of the BMCKS bit. If neither BMCKS nor BTCKS is
set, the BERT will use the recovered clock.
Bits 3 to 0: G.772 Monitoring Control (GMC[3:0]). These bits are used to select transmitter or receiver for
nonintrusive monitoring. Receiver 1 is used to monitor Channels 2 to 8 of one receiver from RTIP2–
RTIP8/RRING2–RRING8 or of one transmitter from TTIP2–TTIP8/TRING2–TRING8. See
Register Address (LIUs 9–16):
Bit #
Name
Default
Bit 7: BERT Direction Control Bit (BERTDIR). When this bit is set, the BERT for LIUs 9–16 will be enabled on
the system side of the part (BERT data will come out on RPOS/RNEG and be expected on TPOS/TNEG) for
whichever LIU the BERT is enabled.
Bit 6: BERT MCLK Selection (BMCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit will select MCLK as the BERT clock unless BTCKS is set. If neither BMCKS nor BTCKS is set, the BERT
will use the recovered clock. If the clock used as the BERT clock is MCLK or the recovered clock, TCLK must be
frequency locked to the BERT clock in order for the BERT to sync.
Bit 5: BERT TCLK Selection (BTCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit selects TCLK as the BERT clock, regardless of the state of the BMCKS bit. If neither BMCKS nor BTCKS is
set, the BERT will use the recovered clock.
Bits 3 to 0: G.772 Monitoring Control (GMC). These bits are used to select transmitter or receiver for
nonintrusive monitoring. Receiver 9 is used to monitor Channels 10 to 16 of one receiver from RTIP10–
RTIP16/RRING10–RRING16 or of one transmitter from TTIP10–TTIP16/TRING10–TRING16. See
BERTDIR
BERTDIR
7
0
7
0
BMCKS
BMCKS
6
0
6
0
BGMC
BERT and G.772 Monitoring Control
0Bh
2Bh
BTCKS
BTCKS
5
0
5
0
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
53 of 120
—
—
4
0
4
0
GMC3
GMC3
3
0
3
0
GMC2
GMC2
2
0
2
0
Table
GMC1
GMC1
1
0
1
0
6-9.
Table
GMC0
GMC0
6-10.
0
0
0
0