MC68HC711E9FU

Manufacturer Part NumberMC68HC711E9FU
ManufacturerFreescale Semiconductor
MC68HC711E9FU datasheet
 

Specifications of MC68HC711E9FU

Cpu FamilyHC11Device Core Size8b
Frequency (max)4MHzInterface TypeSCI/SPI
Program Memory TypeEPROMProgram Memory Size12KB
Total Internal Ram Size512Byte# I/os (max)38
Number Of Timers - General Purpose8Operating Supply Voltage (typ)3.3/5V
Operating Supply Voltage (max)5.5VOperating Supply Voltage (min)3V
On-chip Adc8-chx8-bitInstruction Set ArchitectureCISC
Operating Temp Range0C to 70COperating Temperature ClassificationCommercial
MountingSurface MountPin Count64
Package TypePQFPLead Free Status / Rohs StatusNot Compliant
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Operating Modes and On-Chip Memory
Addr.
Register Name
Port A Data Register
$1000
(PORTA)
See page 98.
$1001
Reserved
Parallel I/O Control Register
$1002
(PIOC)
See page 102.
Port C Data Register
$1003
(PORTC)
See page 99.
Port B Data Register
$1004
(PORTB)
See page 99.
Port C Latched Register
$1005
(PORTCL)
See page 99.
$1006
Reserved
Port C Data Direction Register
$1007
(DDRC)
See page 100.
Port D Data Register
$1008
(PORTD)
See page 100.
Port D Data Direction Register
$1009
(DDRD)
See page 100.
Port E Data Register
$100A
(PORTE)
See page 101.
Timer Compare Force Register
$100B
(CFORC)
See page 135.
Output Compare 1 Mask Register
$100C
(OC1M)
See page 136.
Figure 2-7. Register and Control Bit Assignments (Sheet 1 of 6)
34
Bit 7
6
5
Read:
PA7
PA6
PA5
Write:
Reset:
I
0
0
R
R
R
Read:
STAF
STAI
CWOM
Write:
Reset:
0
0
0
Read:
PC7
PC6
PC5
Write:
Reset:
Indeterminate after reset
Read:
PB7
PB6
PB5
Write:
Reset:
0
0
0
Read:
PCL7
PCL6
PCL5
Write:
Reset:
Indeterminate after reset
R
R
R
Read:
DDRC7
DDRC6
DDRC5
Write:
Reset:
0
0
0
Read:
0
0
PD5
Write:
Reset:
U
U
I
Read:
DDRD5
Write:
Reset:
0
0
0
Read:
PE7
PE6
PE5
Write:
Reset:
Indeterminate after reset
Read:
FOC1
FOC2
FOC3
Write:
Reset:
0
0
0
Read:
OC1M7
OC1M6
OC1M5
Write:
Reset:
0
0
0
= Unimplemented
I = Indeterminate after reset
M68HC11E Family Data Sheet, Rev. 5.1
4
3
2
1
PA4
PA3
PA2
PA1
0
I
I
I
R
R
R
R
HNDS
OIN
PLS
EGA
0
0
U
1
PC4
PC3
PC2
PC1
PB4
PB3
PB2
PB1
0
0
0
0
PCL4
PCL3
PCL2
PCL1
R
R
R
R
DDRC4
DDRC3
DDRC2
DDRC1
0
0
0
0
PD4
PD3
PD2
PD1
I
I
I
I
DDRD4
DDRD3
DDRD2
DDRD1
0
0
0
0
PE4
PE3
PE2
PE1
FOC4
FOC5
0
0
0
0
OC1M4
OC1M3
0
0
0
0
R
= Reserved
U = Unaffected
Freescale Semiconductor
Bit 0
PA0
I
R
INVB
1
PC0
PB0
0
PCL0
R
DDRC0
0
PD0
I
DDRD0
0
PE0
0
0