ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 139
ATmega16HVB
Manufacturer Part Number
ATmega16HVB
Description
Manufacturer
Atmel Corporation
Specifications of ATmega16HVB
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
8 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
17
Ext Interrupts
15
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1.9
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
4.0 to 25
Operating Voltage (vcc)
4.0 to 25
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATmega16HVB-8X3
Manufacturer:
LT
Quantity:
51
Part Number:
ATmega16HVB-8X3
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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24.7.3
24.7.4
8042D–AVR–10/11
BPSCTR – Battery Protection Short-current Timing Register
BPOCTR – Battery Protection Over-current Timing Register
• Bit 7 – Reserved
This bit is reserved in the Atmel ATmega16HVB/32HVB and will always read as zero.
• Bit 6:0 – SCPT[6:0]: Short-current Protection Timing
These bits control the delay of the Short-circuit Protection. The Short-circuit Timing can be set
with a step size of 62.5µs as shown in
Table 24-2.
Notes:
Note:
• Bit 7:6 – Reserved
These bits are reserved in the ATmega16HVB/32HVB and will always read as zero.
• Bit 5:0 – OCPT[5:0]: Over-current Protection Timing
These bits control the delay of the Over-circuit Protection. The Over-current Timing can be set
with a step size of 0.5 ms as shown in
Bit
(0xFA)
Read/Write
Initial Value
Bit
(0xFB)
Read/Write
Initial Value
1. The actual value depends on the actual frequency of the
2. Initial value: SCPT[0x10](1ms).
3. An additional delay T
Due to synchronization of parameters between clock domains, a guard time of 3 ULP oscillator
cycles + 3 CPU clock cycles is required between each time the BPSCTR register is written. Any
writing to the BPSCTR register during this period will be ignored.
page
the protection circuit. With nomial ULP frequency this delay is maximum 86µs.
Short-circuit Protection Reaction Time. SCPT[6:0] with corresponding Short-cir-
cuit Delay Time.
27. See
R
R
7
–
0
7
–
0
SCPT[6:0]
0x7E
0x7F
0x00
0x01
0x02
0x03
...
”Electrical characteristics” on page
R/W
R
6
0
6
–
0
Short-circuit Protection Reaction Time
(2)
d
can be expected after enabling the Discharge FET due to initialization of
R/W
R/W
5
0
5
0
Table
Table 24-3 on page
R/W
R/W
4
1
4
0
24-2.
SCPT[6:0]
ATmega16HVB/32HVB
R/W
R/W
3
0
3
0
OCPT[5:0]
225.
140.
(140.5µs - 195.5µs) + T
(78.0µs - 133.0µs) + T
(7.83ms - 7.88ms) + T
(7.89ms - 7.95ms) + T
(15.5µs - 70.5µs) + T
(15.5µs - 70.5µs) + T
R/W
R/W
2
0
”Ultra Low Power RC oscillator” on
2
0
(1)
Typ
R/W
R/W
...
1
0
1
1
R/W
R/W
d
d
0
0
d
d
d
0
0
(3)
(3)
d
(3)
(3)
(3)
(3)
BPSCTR
BPOCTR
139
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