ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 86

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ATmega16HVB

Manufacturer Part Number
ATmega16HVB
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16HVB

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
8 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
17
Ext Interrupts
15
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1.9
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
4.0 to 25
Operating Voltage (vcc)
4.0 to 25
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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17.5.5
17.5.6
17.6
86
Input capture unit
ATmega16HVB/32HVB
8-bit Input capture mode
16-bit input capture mode
value of TCNTn, the counter will miss the Compare Match. The counter will then have to count to
its maximum value (0xFFFF) and wrap around starting at 0x0000 before Compare Match can
occur. As for the 16-bit Mode, the TOVn Flag is set in the same timer clock cycle that the counter
counts from MAX to 0x0000.
The Timer/Counter can be used in a 8-bit Input Capture mode, see
settings. For full description, see
The Timer/Counter can also be used in a 16-bit Input Capture mode, see
for bit settings. For full description, see
The Timer/Counter incorporates an Input Capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicates an event, or mul-
tiple events. For Timer/Counter0, the events can be applied via the PB0 pin (ICP00), or
alternatively via the osi_posedge pin on the Oscillator Sampling Interface (ICP01). For
Timer/Counter1, the events can be applied by the Battery Protection Interrupt (ICP10) or alter-
natively by the Voltage Regulator Interrupt (ICP11). The time-stamps can then be used to
calculate frequency, duty-cycle, and other features of the signal applied. Alternatively the time-
stamps can be used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in
the block diagram that are not directly a part of the Input Capture unit are gray shaded.
Figure 17-4. Input Capture Unit block diagram.
The Output Compare Register OCRnA is a dual-purpose register that is also used as an 8-bit
Input Capture Register ICRn. In 16-bit Input Capture mode the Output Compare Register
OCRnB serves as the high byte of the Input Capture Register ICRn. In 8-bit Input Capture mode
the Output Compare Register OCRnB is free to be used as a normal Output Compare Register,
but in 16-bit Input Capture mode the Output Compare Unit cannot be used as there are no free
Output Compare Register(s). Even though the Input Capture register is called ICRn in this sec-
ICPn1
ICPn0
WRITE
OCRnB (8-bit)
TEMP (8-bit)
ICRn (16-bit Register)
“Input capture unit”
OCRnA (8-bit)
ICSn
“Input capture unit”
DATA BUS
Canceler
Noise
ICNCn
.
(8-bit)
TCNTnH (8-bit)
.
TCNTn (16-bit Counter)
Detector
ICESn
Edge
Figure
Table 17-2 on page 84
TCNTnL (8-bit)
Table 17-2 on page 84
17-4. The elements of
ICFn (Int.Req.)
8042D–AVR–10/11
for bit

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