ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 148

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

148
ATmega16HVB/32HVB
When the battery is started from a power-off condition by connecting a legal charger, SW should
determine whether to allow charging or not before enabling the C-FET. Before allowing charging
it is recommended to use the V-ADC to measure the cell temperature and cell voltages. Depend-
ing on the total cell voltage, the device should either start up in DUVR mode or in normal
charging mode with the C-FET and D-FET enabled.
• If the total cell voltage is below 4.5V, the battery should enter DUVR charging mode. This
• If the total cell voltage is above 4.5V, the battery should enter normal charging mode with both
The
using DUVR mode.
Figure 25-3. DUVR mode charging in 3-cell mode configuration.
1. A charger with 12.6V charge voltage is plugged to the Pack+ pin and the Atmel
2. The ATmega16HVB/32HVB exit reset and initializes modules. To determine if charging
3. D-FET is enabled and the VFET voltage increase to the Pack+ level.
4. DUVR mode is entered by clearing the DUVRD bit in FCSR. The VFET voltage and the
5. The total cell voltage has reached the regulated VFET limit and VFET follows the cell
6. The total cell voltage has reached 5V. DUVR mode is disabled and the C-FET can be
7. Battery voltage reached charger voltage.
ensures safe operation voltage while allowing charging
C-FET and D-FET enabled
ATmega16HVB/32HVB enters reset mode. Charger should be configured with a charge
current limit (pre-charge current).
should be allowed and if DUVR mode should be entered, cell temperature and cell volt-
ages are measured by the V-ADC.
Pack+ voltage will now be regulated to approximately 4.5V.
voltage as the battery is charged.
fully enabled. DUVR mode should be disabled before the C-CFET is enabled. VFET and
Pack+ will therefore rise to the charger voltage for a short period before the C-FET is
enabled.
Figure 25-3
14
12
10
8
6
4
2
0
shows an example of charging three deeply discharged Li-ion cells in series
1 2
3
4
5 6
7
RESET
DUVRD
CFE
DFE
8042D–AVR–10/11
PVT
Pack+