ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 64

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

14.3
14.4
64
Overview
Alternate port functions
ATmega16HVB/32HVB
The High Voltage I/O has alternate port functions in addition to being general digital I/O.
14-3
overridden by alternate functions.
Figure 14-3. High voltage digital I/O
Notes:
Table 14-1 on page 65
indexes from
generated internally in the modules having the alternate function.
shows how the port pin control signals from the simplified
1. WRx, RRx and RPx are common to all pins within the same port. clk
2. The High Voltage Digital Input is not present on PC5.
mon to all ports. All other signals are unique for each pin.
Figure 14-3
Pxn
PVOExn:
PVOVxn:
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
summarizes the function of the overriding signals. The pin and port
are not shown in the succeeding tables. The overriding signals are
1
0
DIEOExn
DIEOVxn
(1)(2)
.
SLEEP
0
1
SYNCHRONIZER
D
L
SET
CLR
RRx:
WRx:
RPx:
clk
DIxn:
SLEEP:
PVOExn
PVOVxn
Q
_
Q
I/O
:
D
PINxn
RESET
CLR
PORTxn
READ PORTx REGISTER
WRITE PORTx REGISTER
READ PINx REGISTER
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
SLEEP CONTROL
Q
Q
_
Q
_
Q
CLR
D
Figure 14-2 on page 63
clk
RRx
RPx
WRx
I/O
DIxn
I/O
and SLEEP are com-
8042D–AVR–10/11
can be
Figure