ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 89

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.7.2
17.8
8042D–AVR–10/11
Timer/counter timing diagrams
Using the Output Compare Unit
Since writing TCNTnH/L will block all Compare Matches for one timer clock cycle, there are risks
involved when changing TCNTnH/L when using the Output Compare Unit, independently of
whether the Timer/Counter is running or not. If the value written to TCNTnH/L equals the
OCRnA/B value, the Compare Match will be missed.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
shows the count sequence close to the MAX value.
Figure 17-6. Timer/counter timing diagram, no prescaling.
Figure 17-7
Figure 17-7. Timer/counter timing diagram, with prescaler (f
Figure 17-8
Figure 17-8. Timer/counter timing diagram, setting of OCFnx, with prescaler (f
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
TOVn
TOVn
OCFnx
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
I/O
Tn
I/O
Tn
/1)
/8)
/8)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCFnA and OCFnB in Normal mode.
Figure 17-6
OCRnx - 1
MAX - 1
MAX - 1
contains timing data for basic Timer/Counter operation. The figure
OCRnx
MAX
MAX
OCRnx Value
ATmega16HVB/32HVB
OCRnx + 1
BOTTOM
clk_I/O
BOTTOM
/8).
Tn
) is therefore shown as a
BOTTOM + 1
BOTTOM + 1
OCRnx + 2
clk_I/O
/8).
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