ATmega324PA Atmel Corporation, ATmega324PA Datasheet - Page 137

• Manufacturer Part Number: ATmega324PA
• Manufacturer: Atmel Corporation

Specifications of ATmega324PA

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

16.11.7
16.11.8
16.11.9
16.11.10 ICR1H and ICR1L – Input Capture Register 1
8272C–AVR–06/11
OCR1BH and OCR1BL – Output Compare Register1 B
OCR3AH and OCR3AL – Output Compare Register3 A
OCR3BH and OCR3BL – Output Compare Register3 B
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See “Accessing 16-bit Registers” on page 113.
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT3). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See “Accessing 16-bit Registers” on page 113.
The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
Bit
(0x8B)
(0x8A)
Read/Write
Initial Value
Bit
(0x99)
(0x98)
Read/Write
Initial Value
Bit
(0x9B)
(0x9A)
Read/Write
Initial Value
Bit
(0x87)
(0x86)
Read/Write
Initial Value
ATmega164A/PA/324A/PA/644A/PA/1284/P
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
4
OCR1B[15:8]
0
4
OCR3A[15:8]
0
4
OCR3B[15:8]
0
4
0
OCR1B[7:0]
OCR3A[7:0]
OCR3B[7:0]
ICR1[15:8]
ICR1[7:0]
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
OCR1BH
OCR3AH
OCR3BH
OCR1BL
OCR3AL
OCR3BL
ICR1H
ICR1L
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