ATmega324PA Atmel Corporation, ATmega324PA Datasheet - Page 91

• Manufacturer Part Number: ATmega324PA
• Manufacturer: Atmel Corporation

Specifications of ATmega324PA

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Register Description
14.3.5
14.3.6
14.3.7
14.3.8
14.3.9
14.3.10
14.3.11
8272C–AVR–06/11
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
PINA – Port A Input Pins Address
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port B Input Pins Address
Note:
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 73
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x02 (0x22)
Read/Write
Initial Value
Bit
0x01 (0x21)
Read/Write
Initial Value
Bit
0x00 (0x20)
Read/Write
Initial Value
Bit
0x05 (0x25)
Read/Write
Initial Value
Bit
0x04 (0x24)
Read/Write
Initial Value
Bit
0x03 (0x23)
Read/Write
Initial Value
1. Only available in the ATmega164PA/324PA/644PA/1284P.
PORTB7
PORTA7
ATmega164A/PA/324A/PA/644A/PA/1284/P
PINA7
PINB7
DDB7
DDA7
JTD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
7
0
7
0
7
0
7
7
0
7
0
7
BODS
PORTA6
PORTB6
PINA6
PINB6
DDB6
DDA6
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
6
0
6
0
6
0
6
6
0
6
0
6
(1)
for more details about this feature.
PORTA5
PORTB5
BODSE
PINA5
PINB5
DDA5
DDB5
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R/W
5
0
5
0
5
5
0
5
0
5
5
0
(1)
PORTA4
PORTB4
PINA4
PINB4
DDA4
DDB4
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
4
0
4
0
4
4
0
4
0
4
PUD
R/W
0
4
PORTA3
PORTB3
PINA3
PINB3
DDA3
DDB3
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
3
0
3
0
3
3
0
3
0
3
R
3
–
0
PORTA2
PORTB2
PINA2
PINB2
DDA2
DDB2
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
2
0
2
0
2
2
0
2
0
2
R
2
–
0
PORTA1
PORTB1
PINA1
PINB1
DDA1
DDB1
R/W
R/W
R/W
R/W
R/W
R/W
IVSEL
N/A
N/A
R/W
1
0
1
0
1
1
0
1
0
1
1
0
PORTA0
PORTB0
PINA0
PINB0
DDA0
DDB0
R/W
IVCE
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
0
0
0
0
0
0
0
0
0
0
0
0
MCUCR
PORTA
PORTB
DDRA
DDRB
PINA
PINB
”Con-
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