ATmega324PA Atmel Corporation, ATmega324PA Datasheet - Page 275

• Manufacturer Part Number: ATmega324PA
• Manufacturer: Atmel Corporation

Specifications of ATmega324PA

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.6
8272C–AVR–06/11
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P Boundary-scan Order
Table 25-1
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The
scan order follows the pin-out order as far as possible. Therefore, the bits of Port A and Port K is
scanned in the opposite bit order of the other ports. Exceptions from the rules are the Scan
chains for the analog circuits, which constitute the most significant bits of the scan chain regard-
less of which physical pin they are connected to. In
PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6 and 7 of Port F is not in the scan chain, since
these pins constitute the TAP pins when the JTAG is enabled.
Table 25-1.
Bit Number
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
shows the Scan order between TDI and TDO when the Boundary-scan chain is
ATmega164A/PA/324A/PA/644A/PA/1284/P
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P Boundary-scan
Order
Signal Name
PB0.Data
PB0.Control
PB1.Data
PB1.Control
PB2.Data
PB2.Control
PB3.Data
PB3.Control
PB4.Data
PB4.Control
PB5.Data
PB5.Control
PB6.Data
PB6.Control
PB7.Data
PB7.Control
RSTT
Figure
Module
Port B
Reset Logic (Observe Only)
25-3, PXn. Data corresponds to FF0,
275