ATmega324PA Atmel Corporation, ATmega324PA Datasheet - Page 580

• Manufacturer Part Number: ATmega324PA
• Manufacturer: Atmel Corporation

Specifications of ATmega324PA

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8272C–AVR–06/11
22 AC - Analog Comparator ..................................................................... 240
23 ADC - Analog-to-digital Converter ..................................................... 243
24 JTAG Interface and On-chip Debug System ..................................... 263
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 269
21.1Features ..............................................................................................................210
21.2Two-wire Serial Interface Bus Definition ..............................................................210
21.3Data Transfer and Frame Format ........................................................................211
21.4Multi-master Bus Systems, Arbitration and Synchronization ...............................214
21.5Overview of the TWI Module ...............................................................................216
21.6Using the TWI ......................................................................................................218
21.7Transmission Modes ...........................................................................................221
21.8Multi-master Systems and Arbitration ..................................................................234
21.9Register Description ............................................................................................235
22.1Overview .............................................................................................................240
22.2Analog Comparator Multiplexed Input .................................................................240
22.3Register Description ............................................................................................241
23.1Features ..............................................................................................................243
23.2Overview .............................................................................................................243
23.3Operation .............................................................................................................244
23.4Starting a Conversion ..........................................................................................245
23.5Prescaling and Conversion Timing ......................................................................246
23.6Changing Channel or Reference Selection .........................................................249
23.7ADC Noise Canceler ...........................................................................................251
23.8ADC Conversion Result ......................................................................................256
23.9Register Description ............................................................................................258
24.1Features ..............................................................................................................263
24.2Overview .............................................................................................................263
24.3TAP – Test Access Port ......................................................................................263
24.4TAP Controller .....................................................................................................265
24.5Using the Boundary-scan Chain ..........................................................................266
24.6Using the On-chip Debug System .......................................................................266
24.7On-chip Debug Specific JTAG Instructions .........................................................267
24.8Using the JTAG Programming Capabilities .........................................................267
24.9Bibliography .........................................................................................................268
24.10Register Description ..........................................................................................268
ATmega164A/PA/324A/PA/644A/PA/1284/P
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