ATmega324PA Atmel Corporation, ATmega324PA Datasheet - Page 338

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ATmega324PA

Manufacturer Part Number
ATmega324PA
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega324PA

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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28.6
8272C–AVR–06/11
SPI Timing Characteristics
See
Table 28-15. SPI Timing Parameters
Note:
Figure 28-3. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 28-3 on page 338
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
1. In SPI Programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
MISO
MOSI
SS high to tri-state
SCK
SCK
SCK to out high
SCK to SS high
SCK high/low
SS low to SCK
SS
ATmega164A/PA/324A/PA/644A/PA/1284/P
Rise/Fall time
Rise/Fall time
SCK high/low
SS low to out
Description
CLCL
CLCL
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
Setup
Setup
Hold
Hold
for f
for f
CK
CK
< 12MHz
> 12MHz
6
4
(1)
MSB
5
MSB
and
Figure 28-4 on page 339
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
...
4 • t
2 • t
...
Min
10
t
20
20
ck
ck
ck
for details.
See
50% duty cycle
2
0.5 • t
Table 18-5
Typ
3.6
10
10
15
10
10
15
10
LSB
1
sck
LSB
2
3
Max
1600
8
ns
338

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