ATmega324PA Atmel Corporation, ATmega324PA Datasheet - Page 82

• Manufacturer Part Number: ATmega324PA
• Manufacturer: Atmel Corporation

Specifications of ATmega324PA

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.3.2
8272C–AVR–06/11
Alternate Functions of Port B
The Port B pins with alternate functions are shown in
Table 14-6.
The alternate pin configuration is as follows:
• SCK/OC3B/PCINT15 – Port B, Bit 7
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is enabled as a
slave, this pin is configured as an input regardless of the setting of DDB7. When the SPI0 is
enabled as a master, the data direction of this pin is controlled by DDB7. When the pin is forced
to be an input, the pull-up can still be controlled by the PORTB7 bit.
OC3B, Output Compare Match B output: The PB7 pin can serve as an external output for the
Timer/Counter3 Output Compare. The pin has to be configured as an output (DDB7 set “one”) to
serve this function. The OC3B pin is also the output pin for the PWM mode timer function.
PCINT15, Pin Change Interrupt source 15: The PB7 pin can serve as an external interrupt
source.
• MISO/OC3A/PCINT14 – Port B, Bit 6
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as a
master, this pin is configured as an input regardless of the setting of DDB6. When the SPI is
enabled as a slave, the data direction of this pin is controlled by DDB6. When the pin is forced to
be an input, the pull-up can still be controlled by the PORTB6 bit.
Port Pin
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Alternate Functions
SCK (SPI Bus Master clock input)
OC3B (Timer/Conter 3 Output Compare Match B Output)
PCINT15 (Pin Change Interrupt 15)
MISO (SPI Bus Master Input/Slave Output)
OC3A (Timer/Conter 3 Output Compare Match A Output)
PCINT14 (Pin Change Interrupt 14)
MOSI (SPI Bus Master Output/Slave Input)
ICP3 (Timer/Counter3 Input Capture Trigger)
PCINT13 (Pin Change Interrupt 13)
SS (SPI Slave Select input)
OC0B (Timer/Conter 0 Output Compare Match B Output)
PCINT12 (Pin Change Interrupt 12)
AIN1 (Analog Comparator Negative Input)
OC0A (Timer/Conter 0 Output Compare Match A Output)
PCINT11 (Pin Change Interrupt 11)
AIN0 (Analog Comparator Positive Input)
INT2 (External Interrupt 2 Input)
PCINT10 (Pin Change Interrupt 10)
T1 (Timer/Counter 1 External Counter Input)
CLKO (Divided System Clock Output)
PCINT9 (Pin Change Interrupt 9)
T0 (Timer/Counter 0 External Counter Input)
XCK0 (USART0 External Clock Input/Output)
PCINT8 (Pin Change Interrupt 8)
ATmega164A/PA/324A/PA/644A/PA/1284/P
Port B Pins Alternate Functions
Table
14-6.
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