DSPIC30F2023 Microchip Technology Inc., DSPIC30F2023 Datasheet - Page 188

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DSPIC30F2023

Manufacturer Part Number
DSPIC30F2023
Description
28/44-pin Dspic30f1010/202x Enhanced Flash Smps 16-bit Digital Signal Controller
Manufacturer
Microchip Technology Inc.
Datasheet

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dsPIC30F1010/202X
16.17 A/D Sample and Convert Timing
The sample and hold circuits assigned to the input pins
have their own timing logic that is triggered when an
external sample and convert request (from PWM or
TMR) is made. The sample and hold circuits have a
fixed two clock data sample period. When the sample
has been acquired, then the ADC control logic is noti-
FIGURE 16-3:
DS70178C-page 186
adc_clk
sample_even
sample_odd
connect_first
connect_second
convert_en
capture_first_data
capture_second_data
state counter
0
1
10th 9th 8th
2
DETAILED CONVERSION SEQUENCE TIMINGS, SEQSAMP = 0, NOT BUSY
3
4
T
7th
AD
5
6th
6
5th
7
4th
8
3rd 2nd 1st
9
Preliminary
10
11
10th 9th 8th
fied of a pending request, then the conversion is
performed as the conversion resources become
available.
The ADC module always converts pairs of analog input
channels, so a typical conversion process requires 24
clock cycles.
12
13
14
15
7th
16
6th
17
5th
© 2006 Microchip Technology Inc.
18
4th
19
3rd
20
2nd 1st
21
0
1
2

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