DSPIC30F2023 Microchip Technology Inc., DSPIC30F2023 Datasheet - Page 201

• Manufacturer Part Number: DSPIC30F2023
• Description: 28/44-pin Dspic30f1010/202x Enhanced Flash Smps 16-bit Digital Signal Controller
• Manufacturer: Microchip Technology Inc.

REGISTER 18-1:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
HC = Cleared by hardware
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6
CLKLOCK
R/W-0
U-0
—
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Group Selection bits (read-only)
000 = Fast RC Oscillator (FRC)
001 = Fast RC Oscillator (FRC) with PLL Module
010 = Primary Oscillator (HS, EC)
011 = Primary Oscillator (HS, EC) with PLL Module
100 = Reserved
101 = Reserved
110 = Reserved
111 = Reserved
This bit is Reset upon:
Set to FRC value (‘000’) on POR
Loaded with NOSC<2:0> at the completion of a successful clock switch
Set to FRC value (‘000’) when FSCM detects a failure and switches clock to FRC
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Group Selection bits
000 = Fast RC Oscillator (FRC)
001 = Fast RC Oscillator (FRC) with PLL Module
010 = Primary Oscillator (HS, EC)
011 = Primary Oscillator (HS, EC) with PLL Module
100 = Reserved
101 = Reserved
110 = Reserved
111 = Reserved
CLKLOCK: Clock Lock Enabled bit
1 = If (FCKSM1 = 1), then clock and PLL configurations are locked
0 = Clock and PLL selection are not locked, configurations may be modified
Unimplemented: Read as ‘0’
Note:
HS,HC
If (FCKSM1 = 0), then clock and PLL configurations may be modified
R-y
U-0
—
OSCCON: OSCILLATOR CONTROL REGISTER
Once set, this bit can only be cleared via a Reset.
COSC<2:0>
x = Bit is unknown
W = Writable bit
‘1’ = Bit is set
HS = Set by hardware
HS,HC
HS,HC
LOCK
R-y
R-0
PRCDEN
HS,HC
R/W-0
R-y
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
-y = Value set from Configuration bits on POR
HS,HC
R/C-0
U-0
CF
—
dsPIC30F1010/202X
TSEQEN
R/W-y
R/W-0
NOSC<2:0>
R/W-y
U-0
—
DS70178C-page 199
OSWEN
R/W-y
R/W-0
HC
bit 8
bit 0