DSPIC30F2023 Microchip Technology Inc., DSPIC30F2023 Datasheet - Page 195

• Manufacturer Part Number: DSPIC30F2023
• Description: 28/44-pin Dspic30f1010/202x Enhanced Flash Smps 16-bit Digital Signal Controller
• Manufacturer: Microchip Technology Inc.

REGISTER 17-1:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-8
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CMPON
R/W-0
R/W-0
INSEL<1:0>
CMPON: A/D Operating Mode bit
1 = Comparator module is enabled
0 = Comparator module is disabled (reduces power consumption)
Unimplemented: Read as ‘0’
CMPSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode.
0 = Continue module operation in Idle mode.
If a device has multiple comparators, any CMPSIDL bit set to ‘1’ disables ALL comparators while in
Idle mode.
Reserved: Read as ‘0’
INSEL<1:0>: Input Source Select for Comparator bits
00 = Select CMPxA input pin
01 = Select CMPxB input pin
10 = Select CMPxC input pin
11 = Select CMPxD input pin
EXTREF: Enable External Reference bit
1 = External source provides reference to DAC
0 = Internal reference sources provide source to DAC
Reserved: Read as ‘0’
CMPSTAT: Current State of Comparator Output Including CMPPOL Selection bit
Reserved: Read as ‘0’
CMPPOL: Comparator Output Polarity Control bit
1 = Output is inverted
0 = Output is non inverted
RANGE: Selects DAC Output Voltage Range bit
1 = High Range: Max DAC value = AV
0 = Low Range: Max DAC value = INTREF, 1.2V ±1%
R/W-0
U-0
—
COMPARATOR CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
CMPSIDL
EXTREF
R/W-0
R/W-0
U-0
U-0
Preliminary
—
—
DD
/ 2, 2.5V @ 5 volt V
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CMPSTAT
R/W-0
U-0
—
dsPIC30F1010/202X
X
(CMPCONx)
DD
U-0
U-0
—
—
x = Bit is unknown
CMPPOL
R/W-0
U-0
—
DS70178C-page 193
RANGE
R/W-0
U-0
—
bit 8
bit 0