MT9074AL Zarlink Semiconductor, Inc., MT9074AL Datasheet - Page 36

• Manufacturer Part Number: MT9074AL
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Zarlink Semiconductor, Inc.

MT9074
36
e) Metallic Loopback. MLBK = 0 normal; MLBK = 1
activate, will isolate the external signals RTIP and
RRING from the receiver and internally connect the
analog output TTIP and TRING to the receiver
analog input.
f) Local and remote time slot loopback. Remote time
slot loopback control bit RTSL = 0 normal; RTSL = 1
activate, will loop around transmit ST-BUS time slots
to the DSTo stream. Local time slot loopback bits
LTSL = 0 normal; LTSL = 1 activate, will loop around
receive PCM30 time slots towards the remote
PCM30 end.
The digital, remote, ST-BUS, payload and metallic
loopbacks are located on page 1, address 15H -
Coding and Loopback Control Word. The remote and
local time slot loopbacks are controlled through
control bits 5 and 4 of the Per Time Slot Control
Words, pages 7H and 8H. Local and remote timeslot
loopbacks cannot be present at the same time.
Performance Monitoring
Error Counters
In T1 mode, MT9074 has eight error counters, which
can be used for maintenance testing, an ongoing
measure of the quality of a DS1 link and to assist the
designer in meeting specifications such as TR62411
and T1.403. All counters can be preset or cleared by
writing to the appropriate locations.
Associated with each counter is a maskable event
occurrence interrupt and a maskable counter
overflow interrupt. Overflow interrupts are useful
System
System
System
DSTo
DSTo
DSTo
DSTi
DSTi
DSTi
MT9074
MT9074
MT9074
Rx
Rx
Tx
Tx
Tx
Rx
DS1
DS1
DS1
when cumulative error counts are being recorded.
For example, every time the framing bit error counter
overflow interrupt (FERO) occurs, 256 frame errors
have been received since the last FERO (page 04H,
address 1DH)interrupt. All counters are cleared and
held low by programming the counter clear bit -
CNTCLR - high (bit 4 of the Reset Control Word,
page 1H, address 1AH). An alternative approach to
event reporting is to mask error events and to enable
the 1 second sample bit (SAMPLE - bit 3 of the
Reset Control Word). When this bit is set the
counters for change of frame alignment, loss of
frame alignment, bpv errors, crc errors, errored
framing bits, and multiframes out of sync are
updated on one second intervals coincident with the
maskable one second interrupt timer.
In E1 mode, MT9074 has six error counters, which
can be used for maintenance testing, an ongoing
measure of the quality of a PCM30 link and to assist
the designer in meeting specifications such as ITU-T
I.431 and G.821. All counters can be preset or
cleared by writing to the appropriate locations.
Associated with each counter is a maskable event
occurrence interrupt and a maskable counter
overflow interrupt. Overflow interrupts are useful
when cumulative error counts are being recorded.
For example, every time the frame error counter
overflow (FERO) interrupt occurs, 256 frame errors
have been received since the last FERO interrupt. All
counters are cleared and held low by programming
the counter clear bit (master control page 01H,
address 1A, bit 4) high. Counter overflows set bits in
the counter overflow latch (page 04H, address 1FH);
this latch is cleared when read.
The overflow reporting latch (page 04H, address
1FH) contains a register whose bits are set when
individual counters overflow. These bits stay high
until the register is read.
T1 Counters
Framing Bit Error Counter (FC7-0)
This eight bit counter counts errors in the framing
pattern. In ESF mode any error in the 001011
framing pattern increments the counter. In SLC-96
mode any error in the Ft bit position is counted. In D4
mode Ft errors are always counted, Fs bits (except
for the Sbit in frame 12) may optionally be counted (if
control bit FSI is set high - page 1H, address 10H, bit
2). The counter is located on page 4H, address 13H.
There are two maskable interrupts associated with
the Framing bit error measurement. A single error
may generate an interrupt (enable by setting FERI
Data Sheet