MT9074AL Zarlink Semiconductor, Inc., MT9074AL Datasheet - Page 72

• Manufacturer Part Number: MT9074AL
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Zarlink Semiconductor, Inc.

MT9074
72
3-0
Bit
Bit
Table 80 - Transmit Alarm Control Word (E1)
7
6
5
4
3
1
2
Table 81 - HDLC Selection Word (E1)
Name
RxTRSP
TxTRSP
HDLC0
HDLC1
Name
- - -
TIU1
- - -
- - -
Unused
(Page 1, Address 12H)
(Page 1, Address 11H)
Unused.
Unused.
HDLC0
HDLC0 is connected to the data
link on selected Sa bits at a rate of
4, 8, 12, 16 or 20 kbits/sec. If zero,
HDLC0 is deselected and all
HDLC0 interrupts are masked.
HDLC1
HDLC1 is connected to time slot
16 in CCS mode. If zero, HDLC1 is
deselected
interrupts are masked.
Receive
When this bit is set to one, the
framing function is disabled on the
receive side. Data coming from the
receive line passes through the
slip buffer and drives DSTo with an
arbitrary alignment. When zero,
the
operates normally.
Transmit Transparent Mode. If
one, the MT9074 is in transmit
transparent mode. No framing or
signaling is imposed on the data
transmit from DSTi onto the line. If
zero, it is in termination mode.
Transmit International Use One.
When CRC-4 operation is disabled
(CSYN=1), this bit is transmit on
the PCM30 2048 kbit/sec. link in
bit position one of time-slot zero of
non-frame-alignment frames. It is
reserved for international use and
should normally be kept at one. If
CRC processing is used, i.e.,
CSYN =0, this bit is ignored.
Functional Description
Functional Description
receive
Select.
Select.
Transparent
and
framing
If
If
all
one,
one,
function
HDLC1
Mode.
then
then
Table 82 - Transmit Multiframe Alignment Signal
Bit
7-4
Bit
0
3
2
Table 81 - HDLC Selection Word (E1)
TMA1-4
Name
TIU0
Name
X1
Y
(Page 1, Address 13H)
(Page 1, Address 12H)
Transmit International Use Zero.
When CRC-4 operation is disabled
(CSYN=1), this bit is transmit on
the PCM30 2048 kbit/sec. link in
bit position one of time-slot zero of
frame-alignment
reserved for international use and
should normally be kept at one. If
CRC processing is used, i.e.,
CSYN =0, this bit is ignored.
Transmit Multiframe Alignment
Bits One to Four. These bits are
transmitted on the PCM30 2048
kbit/sec. link in bit positions one to
four of time slot 16 of frame zero
of every signaling multiframe.
These bits are used by the far end
to identify specific frames of a
signaling multiframe. TMA1-4 =
0000 for normal operation.
This bit is transmitted on the
PCM30 2048 kbit/sec. link in bit
position five of time slot 16 of
frame zero of every multiframe.
X1 is normally set to one.
This bit is transmitted on the
PCM30 2048 kbit/sec. link in bit
position six of time slot 16 of
frame zero of every multiframe. It
is used to indicate the loss of
multiframe
remote end of the link. If one -
loss of multiframe alignment; if
zero
acquired. This bit is ignored when
AUTY is zero (page 01H, address
10H).
Functional Description
Functional Description
(E1)
-
multiframe
alignment
frames.
Data Sheet
alignment
to
It
the
is