MT9074AL Zarlink Semiconductor, Inc., MT9074AL Datasheet - Page 45

• Manufacturer Part Number: MT9074AL
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Zarlink Semiconductor, Inc.

Data Sheet
Bit
Table 22 - Transmit Alarm Control Word (T1)
7
6
5
4
3
2
1
0
TXSECY
D4SECY
ESFYEL
D4YEL
Name
TxAO
LUA
LDA
SO
(Page 1, Address 11H)
ESFYellow Alarm. Setting this bit
while in ESF mode causes a
repeating pattern of eight 1’s
followed by eight 0’s to be insert
onto the transmit FDL (JTS bit set
low - see Data Link Control Word)
or sixteen 1’s (Japan Telecom bit
set high).
Transmit Secondary D4 Yellow
Alarm. Setting this bit (in D4
mode) causes the S bit of
transmit frame 12 to be set.
D4 Yellow Alarm. When set bit 2
of all DS0 channels are forced
low.
Transmit All Ones. When low,
this control bit forces a framed or
unframed (depending on the state
of Transmit Alarm Control bit 0)
all ones to be transmit at TTIP
and TRING.
Loop Up Activate. Setting this bit
forces transmission of a framed
or unframed (depending on the
state of Transmit Alarm Control
bit 0) repeating pattern of 00001.
Loop Down Activate. Setting
this bit forces transmission of a
framed or unframed (depending
on the state of Transmit Alarm
Control bit 0) repeating pattern of
001.
D4 Secondary Alarm. Set this bit
for
secondary Yellow Alarm. The Fs
bit in the 12th frame will not be
used for counting errored framing
bits. If a one is received in the Fs
bit position of the 12th frame a
Secondary Yellow Alarm Detect
bit will be set.
Overhead Sbits Override. If set,
this bit forces the overhead bits to
be inserted as an overlay on any
of the following alarm conditions:
i) transmit all ones, ii) loop up
code insertion, iii) loop down code
insertion.
Functional Description
trunks
employing
the
Bit
7
6
5
4
3
2
Table 23 - Data Link Control Word (T1)
TxSYNC
BIOMEn
HDLC0
HDLC1
Name
TRSP
EDL
(Page 1, Address 12H)
Enable Data Link. Setting this bit
multiplexes
clocked in on pin TxDL into the
FDL bit position (ESF mode) or the
Fs position (D4 mode).
Bit Oriented Messaging Enable.
Setting
transmission of bit - oriented
messages on the ESF facility data
link. The actual message transmit
at any one time is contained in the
BIOMTx register (page 1, address
13H). The receive bit - oriented
message register is always active,
although the interrupt associated
with it may be masked.
HDLC0 Enable. Setting this bit
selects
controller for transmission of data
link information in the FDL Sbits of
an ESF frame. The HDLC receiver
is
interrupts associated with it may
be masked.
HDLC1 Enable. Setting this bit
selects
controller for transmission on DS1
channel 24. The HDLC receiver is
always active, although interrupts
associated with it may be masked.
Transmit
Setting this bit causes the transmit
multiframe
internally
incoming Sbits on DSTi channel
31 bit 0.
Transparent Mode. Setting this bit
causes unframed data to be
transmit from DSTi channels 0 to
23 and channel 31 bit 0 to be
transmit transparently onto the
DS1 line. Unframed data received
from the DS1 line is piped out on
DSTo channels 0 to 23 and
channel 31 bit 0.
Functional Description
always
the
the
synchronized
this
the
boundary
active,
Synchronization.
internal
internal
serial
bit
MT9074
although
enables
to
to
stream
HDLC
HDLC
the
be
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