MT9074AL Zarlink Semiconductor, Inc., MT9074AL Datasheet - Page 58

• Manufacturer Part Number: MT9074AL
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Zarlink Semiconductor, Inc.

MT9074
58
4 - 0
7 - 3 PD4 -
1-0
Bit
Bit
7
6
5
2
Table 51 - Receive Signal Status Word
TSLPD Transmit Slip Direction. If one,
Name
Table 52 - MSB Transmit Slip Buffer
Name
TSLIP Transmit Slip. A change of state (i.e.
LLOS LIU Loss of Signal indication. This
TxSB
MSB
PD0
- - -
- - -
(Page 3, Address 16H) (T1)
(Page 3, Address 17H) (T1)
Peak
These five bits indicate the level of the
received signal AMI pulses.
PD4
0
0
0
0
1
bit will be high when the received
signal is less than 40 dB below the
nominal value for a period of at least 1
msec. This bit will be low for normal
operation.
Unused
1-to-0 or 0-to-1) indicates that a
transmit controlled frame slip has
occurred.
indicates that the last transmit frame
slip resulted in a repeated frame, i.e.,
the internally generated 1.544 Mhz.
transmit clock is faster than the system
clock (C4b). If zero, indicates that the
last transmit frame slip resulted in a
lost
generated 1.544 Mhz. transmit clock is
slower than network clock. Updated on
an TSLIP occurrence basis.
Transmit Slip Buffer MSB. The most
significant bit of the phase status
word. If one, delay through the
transmit elastic buffer is greater than
one frame in length; if zero, delay
through the receive elastic buffer is
less than one frame in length. Bit is
reset whenever page 1 address 17H -
Transmit Slip Buffer Delay - is written
to.
Unused.
PD3
0
0
0
1
0
Functional Description
frame,
Functional Description
Detector
PD2 PD1 PD0
0
0
1
0
0
0
1
0
0
0
i.e.,
1
0
0
0
0
Voltage
the
Line Attenuation
less than 4dB
3-8dB
8-14dB
14-20dB
more than 20dB
internally
Levels.
7 - 3 TxTS4 - 0 Transmit Time Slot. A five bit
2 - 0 TxBC2 - 0 Transmit Bit Count. A three bit
7-0
Bit
Bit
Table 53 - Transmit Slip Buffer Delay
Name
ID7-0 ID Number. Contains device code
Name
Table 54 - Identification Word
(Page 3, Address 1FH) (T1)
(Page 3, Address 18H) (T1)
10101111
counter that indicates the number
of STBUS time slots between the
transmit elastic buffer STBUS write
frame boundary and the internal
transmit read frame boundary. The
count is updated every 250 uS.
counter indicating the number of
STBUS bit times there are between
the transmit elastic buffer STBUS
write frame boundary and the
internal read frame boundary. The
count is updated every 250 uS.
Functional Description
Functional Description
Data Sheet