mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 26

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mg84fl54

Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
9. Dual Data Pointer Register (DPTR)
The dual DPTR structure as shown in Fig 9-1 is a way by which the chip can specify the address of an external
data memory location. There are two 16-bit DPTR registers that address the external memory, and a single bit
called DPS (AUXR.0) that allows the program code to switch between them.
Fig 9-1 Dual DPTR
DPTR Instructions
The six instructions that refer to DPTR currently selected using the DPS bit are as follows:
AUXR (Address=8EH, Auxiliary Register)
DPS: DPTR select bit, used to switch between DPTR0 and DPTR1.
Table 9-1 DPTR select table
Note:
26
DPS
INC DPTR
MOV DPTR,#data16
MOV A,@A+DPTR
MOVX A,@DPTR
MOVX @DPTR,A
JMP @A+DPTR
DPTR0
DPTR1
0
1
7
The DPS bit status should be saved by firmware when switching between DPTR0 and DPTR1.
-
(83h)
DPH
DPH
DPTR selected
6
-
DPTR0
DPTR1
(82h)
DPL
DPL
BRADJ0
; Increments the data pointer by 1
; Loads the DPTR with a 16-bit constant
; Move code byte relative to DPTR to ACC
; Move external RAM (16-bit address) to ACC
; Move ACC to external RAM (16-bit address)
; Jump indirect relative to DPTR
5
AUXR.DPS=1
AUXR.DPS=0
MG84FL54B Data Sheet
4
-
T2X12
External Data Memory
3
2
-
1
-
DPS
0
MEGAWIN

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