mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 44

• Manufacturer Part Number: mg84fl54
• Description: Full-speed Usb Micro-controller
• Manufacturer: Megawin Technology

Fig 12-7 UART Frame Error Detection
12.5. Multiprocessor Communications
Modes 2 and 3 have a special provision for multiprocessor communications as shown in Fig 12-8. In these two
modes, 9 data bits are received. The 9th bit goes into RB8. Then comes a stop bit. The port can be
programmed such that when the stop bit is received, the serial port interrupt will be activated only if RB8=1. This
feature is enabled by setting bit SM2 (in SCON register). A way to use this feature in multiprocessor systems is
as follows:
When the master processor wants to transmit a block of data to one of several slaves, it first sends out an
address byte which identifies the target slave. An address byte differs from a data byte in that the 9th bit is 1 in
an address byte and 0 in a data byte. With SM2=1, no slave will be interrupted by a data byte. An address byte,
however, will interrupt all slaves, so that each slave can examine the received byte and check if it is being
addressed. The addressed slave will clear its SM2 bit and prepare to receive the data bytes that will be coming.
The slaves that weren’t being addressed leave their SM2 set and go on about their business, ignoring the
coming data bytes.
SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the stop bit. In a Mode 1
reception, if SM2=1, the receive interrupt will not be activated unless a valid stop bit is received.
Fig 12-8 UART Multiprocessor Communications
12.6. Automatic Address Recognition
Automatic Address Recognition is a feature which allows the UART to recognize certain addresses in the serial
bit stream by using hardware to make the comparisons. This feature saves a great deal of firmware overhead
by eliminating the need for the firmware to examine every serial address which passes by the serial port. This
feature is enabled by setting the SM2 bit in SCON.
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SCON
Start
Slave 3
RX
TX
SM0/FE
D0
SM1
Slave 2
RX
D1
TX
SM2
D2
MG84FL54B Data Sheet
REN
Slave 1
RX
PCON.SMOD0
D3
TX
TB8
9-bit data
D4
SET FE bit if STOP=0
SM0 to UART mode control
RB8
D5
TI
RX
Master
RI
D6
TX
D7
VCC
R
D8
Pull-up
Stop
MEGAWIN