mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 89

• Manufacturer Part Number: mg84fl54
• Description: Full-speed Usb Micro-controller
• Manufacturer: Megawin Technology

Fig 19-2 USB FIFO Configuration
19.3. USB Interrupt
The following Fig 19-3 shows the USB interrupt structure and there are 11 interrupt flags which are located in
USB SFRs shown in .The USB interrupt is generated on the combination of USB event flags and USB endpoint
flags contained in USB SFRs. The USB event flags include USB reset flag (URST), USB resume flag (URSM)
and USB suspend flag (USUS) can indicate that the upstream host has sent the USB reset, resume or suspend
event on usb bus to device. The USB endpoint flags, as UTXDx and URXDx (x=0~3), show the USB data
transmission or reception of respective endpoint had been done by usb transceiver. The associated interrupt
enable bits are located in UIE, UIE1 and IEN registers.
Fig 19-3 USB Interrupt Structure
19.4. USB Special Function Registers
Before using the USB function of MG84FL54B, the user should enable PLL (EN_PLL) to be a 48MHz clock
source for USB block and enable USB block function (EN_USB) to start the USB operation. The following
configuration sequence should be performed before using USB function:
Before using USB function
Step 0: Set a correct value in CKCON by OSCin frequency.
MEGAWIN
1. Non Dual Buffer Mode
INT/BULK/
INT/BULK
SOFIF
UTXD2
UTXD1
ASOFIF
URXD0
UTXD0
Control
URXD3
UTXD3
ISO
UIE
UIE1
Endp 3 OUT/
SOFIE
ASOFIE
UTXIE2
UTXIE1
URXIE0
UTXIE0
URXIE3
UTXIE3
Endp 3 IN
Endp 0
Endp 1 IN
Endp 2 IN
URSM
URST
USUS
UPCON
UIFLG1
UIFLG
MG84FL54B
Total 4 endpoints
Total 256B FIFO
64B
64B
64B
64B
MG84FL54B Data sheet
IEN
EFSR
EF
EF
INT/BULK/
2. Dual Buffer Mode
INT/BULK
Control
ISO
Endp 3 OUT
Endp 0
Endp 1 IN
Endp 2 IN
Total 4 endpoints
USB interrupt to uC
Total 256B FIFO
MG84FL54B
32B
32B
32B
32B
64B
64B
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