mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 59

• Manufacturer Part Number: mg84fl54
• Description: Full-speed Usb Micro-controller
• Manufacturer: Megawin Technology

15. Power Management
MG84FL54B supports two power-saving modes: Idle and Power-down. These modes are accessed through the
PCON register.
15.1. Power Saving Mode
15.1.1. Idle Mode
Setting the IDL bit in PCON enters idle mode. Idle mode halts the internal CPU clock. The CPU state is
preserved in its entirety, including the RAM, stack pointer, program counter, program status word, and
accumulator. The Port pins hold the logical states they had at the time that Idle was activated. Idle mode leaves
the peripherals running in order to allow them to wake up the CPU when an interrupt is generated. Timer 0,
Timer 1, Timer 2, SPI, TWSI, UART and the USB will continue to function during Idle mode. Any enabled
interrupt source or reset may terminate Idle mode. When exiting Idle mode with an interrupt, the interrupt will
immediately be serviced, and following RETI, the next instruction to be executed will be the one following the
instruction that put the device into Idle.
15.1.2. Power-Down Mode
Setting the PD bit in PCON enters Power-down mode. Power-down mode stops the oscillator and powers down
the Flash memory in order to minimize power consumption. Only the power-on circuitry will continue to draw
power during Power-down. During Power-down the power supply voltage may be reduced to the RAM keep-
alive voltage. The RAM contents will be retained; however, the SFR contents are not guaranteed once
VDD_CORE has been reduced. Power-down may be exited by external reset, power-on reset, enabled external
interrupts, enabled keypad interrupt, or enabled USB interrupt.
The user should not attempt to enter (or re-enter) the power-down mode for a minimum of 4 μs until after one of
the following conditions has occurred: Start of code execution (after any type of reset), or Exit from power-down
mode.
15.1.3. Power-Down Wake-up Source
The following figure shows the power-down wake-up sources.
Fig 15-1 Wake-up Sources
15.1.4. Interrupt Recovery from Power-Down Mode
Four external interrupts may be configured to terminate Power-down mode. External interrupts /INT0 (P3.2),
/INT1 (P3.3), /INT2 (P3.6) and /INT3 (P3.7) may be used to exit Power-down. To wake up by external interrupt
/INT0 or /INT1, the interrupt must be enabled and configured to low-level or falling-edge triggered type operation.
To wake up by external interrupt /INT2 or /INT3, the interrupt must be enabled and can be setting to high/low
level-triggered or raising/falling edge-triggered type operation.
MEGAWIN
EUSB
USBI
EKBI
KBIF
EX0
EX1
EX2
EX3
IE0
IE1
IE2
IE3
MG84FL54B Data sheet
EA
External reset
Power-on reset
Wake-up CPU
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