tm1300 NXP Semiconductors, tm1300 Datasheet - Page 124

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
Table 7-7. VO register fIelds
Table
tionality replaces TM1000 functions.
The hardware reset value of EVO_CTL register is
0x10000000, which means that EVO functions are dis-
abled on reset and must be enabled by software. The MS
four bits indicate the EVO revision number.
To ensure compatibility with future devices, any unde-
fined MMIO bits should be ignored when read, and writ-
ten as ‘0’s.
7.16.5
As shown in
troduced in the TM1300, as follows.
7.17
As described in
video-refresh or data-transfer modes. The DSPCPU
7-20
VO_OLADD
VO_VUF
VO_YOLF
Figure 7-31. EVO MMIO registers.
Register
MMIO_BASE
0x10 184C
0x10 1840
0x10 1844
0x10 1848
0x10 1850
7-8. If features are enabled, new TM1300 the func-
offset:
ENHANCED VIDEO OUT OPERATION
EVO-Related Registers
Figure
Section
OL_BASE_ADDR
SIZE2
U_OFFSET
V_OFFSET
Y_OFFSET
OL_OFFSET
EVO_CTL (r/w)
EVO_MASK (r/w)
EVO_CLIP (r/w)
EVO_KEY (r/w)
EVO_SLVDLY (r/w)
7-31, four additional registers are in-
Field
7.14, the EVO operates in either
PRODUCT SPECIFICATION
31
Overlay-image buffer address or Buffer 2 length.
• In video-refresh modes: overlay-image starting byte address. OL_BASE can be repro-
• In data-streaming mode: Buffer 2 length in bytes. Note: Must be multiple of 64 in data-
Offset in bytes from start of one line to start of next line (16-bits unsigned).
Offset in bytes from start of one line to start of next line (16-bits unsigned).
Offset in bytes from start of one line to start of next line (16-bits unsigned).
Offset in bytes from start of one line to start of next line (16-bits unsigned).
MASK_Y
31
0
HIGHER_CLIPUV
grammed on a frame-by-frame basis.
streaming mode; Not used in message-passing mode.
0
RESERVED
RESERVED
0
1
27
MASK_UV
27
23
23
LOWER_CLIPUV
KEY_V
• EVO_MASK and EVO_KEY — used in chroma key
• EVO_CLIP — provides programmable clipping (see
•
• EVO_SLVDLY — used in Genlock mode (see
These registers are shown in
ister fields are shown in
To ensure compatibility with future devices, any unde-
fined MMIO bits should be ignored when read, and writ-
ten as ‘0’s.
starts the EVO by setting the appropriate VO MMIO reg-
isters and the appropriate EVO MMIO registers.
VO_CTL.MODE must be set to the appropriate transfer
mode, appropriate addresses, address offsets, and im-
age timing registers and the associated control bits in the
control register must be set. Lastly, software sets
(see
Section
Section
19
RESERVED
19
Section
Description
7.15.3).
7.10).
15
15
7.15.2).
HIGHER_CLIPY
KEY_Y
RESERVED
CLIPPING_ENABLE
FULL_BLENDING
SYNC_STREAMING
GENLOCK
Table
11
11
Philips Semiconductors
Figure
SLAVE_DLY
7-9.
FIELD_SYNC
KEY_ENABLE
7
7
EVO_ENABLE
LOWER_CLIPY
7-31, and their reg-
KEY_U
3
3
0
0