tm1300 NXP Semiconductors, tm1300 Datasheet - Page 258

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
• A JTAG controller on the TriMedia processor
18.3.1
Table 18-2. MMIO Register Assignments
TM1300 has two JTAG data registers and one JTAG
control register (see
number a JTAG instructions to manipulate those regis-
ters.
data and control registers. The addresses are offsets
from MMIO_BASE. All references to instruction and data
registers below are JTAG instructions and data registers
and not TriMedia instruction or data registers.
• Two 32-bit data registers, JTAG_DATA_IN and
18-4
Figure 18-3. Additional JTAG data registers and control register
module connects to a 4-pin JTAG connector on a Tri-
Media board which provides a path to the JTAG pins
on a TriMedia processor. It is the responsibility of the
interface module to scan data in and out of the TriMe-
dia processor into its internal buffers and make them
available to the host computer.
which provides a bridge between the external
JTAG TAP and the internal system.
The controller transfers data from/to the TAP to/from
its scannable registers asynchronous to the internal
system clock. A monitor running on a TriMedia pro-
cessor and the debugger front-end running on a host
computer exchange data via JTAG by reading/writing
the MMIO registers reserved for this purpose, includ-
ing a control register used for the handshake.
JTAG_DATA_OUT in MMIO space. Both registers
can be connected in between TDI and TDO like the
standard Bypass and Boundary Scan registers of
JTAG (not shown in
The JTAG_DATA_IN register can be read or written to
via the JTAG port. The JTAG_DATA_OUT register is
read-only via the JTAG port, so that scanning out
JTAG_DATA_OUT is non-destructive.
Table 18-2
MMIO Offset
0x 10 3800
0x 10 3804
0x 10 3808
JTAG Instruction and Data Registers
lists the MMIO addresses of the JTAG
from
TDI
Figure
Figure
PRODUCT SPECIFICATION
18-3) in MMIO space and a
31
7
unused bits
18-3).
31
JTAG_CTRL
JTAG_DATA_OUT
JTAG_DATA_OUT
JTAG_DATA_IN
JTAG Register
JTAG_DATA_IN
JTAG_CTRL
3
sleepless
bit
2
.
0
0
• An 8-bit control register JTAG_CTRL in MMIO
• Two
The JTAG_DATA_IN and JTAG_DATA_OUT are read-
able/writable from the TriMedia processor via the
usual load/store operations.
space. The JTAG_CTRL register is used for hand-
shake between a debug monitor running on a TriMe-
dia and a debugger front-end running on a host.
JTAG_CTRL.ofull = ‘1’ means that JTAG_DATA_OUT
has valid data to be scanned out. On power-on reset
of the TriMedia processor, JTAG_CTRL.ofull = ‘0’.
JTAG_CTRL.ofull is both readable and writable via
JTAG tap. Writing 0 to JTAG_CTRL.ofull via JTAG is
a ‘remember’ operation, i.e., JTAG_CTRL.ofull
retains
JTAG_CTRL.ofull via JTAG is a ‘clear’ operation, i.e.,
JTAG_CTRL.ofull becomes ‘0’.
JTAG_CTRL.ifull
JTAG_DATA_IN register is empty. JTAG_CTRL.ifull =
1 means that JTAG_DATA_IN has valid data and the
debug monitor has not yet copied it to its private
area. On power-on reset of the TriMedia processor,
JTAG_CTRL.ifull = 0. JTAG_CTRL.ifull is readable
and
JTAG_CTRL.ifull via JTAG is a remember operation,
i.e., JTAG_CTRL.ifull retains it previous state. Writing
a ‘1’ to JTAG_CTRL.ifull posts an interrupt on hard-
ware line 18.
The peripheral blocks on a TriMedia processor may
enter a ‘power down’ state to reduce power con-
sumption. The JTAG_CTRL.sleepless bit determines
if the JTAG block participates in a power down state.
In the power-on RESET state, JTAG_CTRL.sleep-
less bit is ‘1’ meaning the JTAG block does not power
down. It can be read and written to by the TriMedia
processor via load/store operations and by the
debugger front-end running on a host by scan in/out.
JTAG_OFULL_OUT.
JTAG_IFULL_IN
JTAG_CTRL.ifull and JTAG_DATA_IN in series. Like-
wise, the virtual register JTAG_OFULL_OUT con-
nects JTAG_CTRL.ofull and JTAG_DATA_OUT in
series.
The reason for the virtual registers is to shorten the
time
ifull
1
writable
virtual
for
its
scanning
previous
ofull
0
registers,
via
=
connects
JTAG.
The
Philips Semiconductors
the
state.
‘0’
TDO
To
JTAG_IFULL_IN
first
JTAG_DATA_IN
means
Writing
Writing
the
virtual
a
that
a
registers
register
‘0’
‘1’
and
and
the
to
to