tm1300 NXP Semiconductors, tm1300 Datasheet - Page 142

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

TM1300 Data Book
Table 9-4. AO Serial Framing Control Fields
9-4
POLARITY
LEFTPOS(9)
RIGHTPOS(9)
DATAMODE
SSPOS
CLOCK_EDGE 0
WS_PULSE
NR_CHAN
Field Name
0
1
This bit should NOT be changed during
operation of the AO unit, i.e. only update this
bit when TRANS_ENABLE = 0.
Defines the bit position within a serial frame
where the first data bit of the left channel is
placed. Reset default ‘0’.
Defines the bit position within a serial frame
where the first data bit of the right channel is
placed. Reset default ‘0’.
0
1
Start/Stop bit position. Reset default 0. Note
that SSPOS is a 5-bit field, with SSPOS bit 4
not-adjacent. This is for backwards compati-
bility in 16 bits/sample modes with TM1000/
1100.
• If DATAMODE=MSB first, transmission
• If DATAMODE=LSB first, SSPOS deter-
See
1
0
1
00
01
10
Each SD output either receives 1 or 2 chan-
nels depending on TRANS_MODE mono
resp. stereo. Non-active channels receive 0
value samples. In mono modes, each chan-
nel of a SD output receives identical left &
right samples. See also
starts with the MSB of the sample, i.e. bit
15 for 16 bits/sample modes or bit 31 for 32
bits/sample modes. SSPOS determines
the bit index (0..31) in the parallel input
word of the last transmitted data bit.
mines the bit index (0..31) in the parallel
word of the first transmitted data bit. Bits
SSPOS up to/including the MSB are trans-
mitted, i.e. up to bit 15 in 16 bits/sample
mode and bit 31 in 32 bits/sample mode.
serial frame starts with an AO_WS
negedge (RESET default)
serial frame starts with an AO_WS
posedge
MSB first (RESET default)
LSB first
Table 9-5
the parallel to serial converter samples
AO_WS on positive edges of AO_SCK
and outputs data on the negative edge
of AO_SCK (RESET default).
the parallel to serial converter samples
AO_WS on negative edges of AO_SCK
and outputs data on positive edges of
AO_SCK.
emit 50% AO_WS (RESET default).
emit single AO_SCK cycle AO_WS
AO_SD1..SD4 are active
Only AO_SD1 is active
AO_SD1 and 2 are active
AO_SD1, 2 and 3 are active
PRODUCT SPECIFICATION
for more information.
Description
Table
9-9.
Every serial frame transmits a single left and right chan-
nel sample, and optional codec control data to each D/A
converter. The left and right sample data can be in an
LSB first or MSB first form, at an arbitrary serial frame bit
position, and with an arbitrary length.
In MSB-first mode (DATAMODE = 0), the parallel to se-
rial converter sends the value of LEFT[MSB] in bit posi-
tion LEFTPOS in the serial frame. Subsequently, bits
from decreasing bit positions in the LEFT data word, up
to and including LEFT[SSPOS], are transmitted in order.
In LSB-first mode (DATAMODE = 1), the parallel-to-seri-
al converter sends the value of LEFT[SSPOS] in bit po-
sition LEFTPOS in the serial frame. Subsequent bits
from the LEFT data word, up to and including
LEFT[MSB], are transmitted in order.
the transmitted bits in different modes.
Table 9-5. Bits transmitted for each memory data
item S
Frame bits that do not belong to either LEFT[MSB:SS-
POS] or RIGHT[MSB:SSPOS] or a codec control field
(Section 9.8, “Codec
This zero extension ensures that TM1300 can be used in
combination with D/A converters of higher precision than
the actual number of transmitted bits in the current oper-
ating mode, e.g. 18-bit D/As operating with 16-bit mem-
ory data.
9.7.1
Due to the implementation, there is a minimum serial
frame length required that is operating mode dependent.
This is shown in
Table 9-6. Minimum serial frame length in bits
16 bits/sample, MSB-first
16 bits/sample, LSB-first
32 bits/sample, MSB-first
32 bits/sample, LSB-first
16 bits/sample, mono
32 bits/sample, mono
16 bits/sample, stereo
32 bits/sample, stereo
operating mode
operating mode
Serial Frame Limitations
Table
Control”) are shifted out as zero.
9-6.
minimum serial frame length
S[SSPOS] S[15]
S[SSPOS] S[31]
Philips Semiconductors
S[15]
S[31]
first
bit
13 bits
13 bits
13 bits
36 bits
S[SSPOS] 0..15
S[SSPOS] 0..31
Table
last
bit
9-5. shows
0..15
0..31
SSPOS
values
valid