tm1300 NXP Semiconductors, tm1300 Datasheet - Page 125

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 7-8. EVO_CTL Register Fields
Table 7-9. EVO-Related MMIO Registers Fields
VO_CTL.VO_ENABLE to begin EVO operation. The
EVO transfers the image, data, or message as com-
manded. In video-refresh and data-streaming modes,
the EVO runs continuously. In message-passing mode,
the EVO runs only until the message has been trans-
ferred.
The EVO unit is reset by a TM1300 hardware reset, or by
a software reset, as described in
SET bit.
Table 7-10. Timing register recommended values
EVO_CTL EVO_ENABLE
EVO_MASK
EVO_CLIP
EVO_KEY
EVO_SLVDLY
VO_CLOCK FREQUENCY
Register
Register
Register
FULL_BLENDING
CLIPPING_ENABLE When set to 1, the values stored in EVO_CLIP are used for the clipping of output data. Otherwise,
SYNC_STREAMING When set to 1 in data-streaming mode, VO_IO2 generates a DATA_VALID signal. See
FIELD_SYNC
GENLOCK
KEY_ENABLE
Field
MASK_Y
MASK_UV
LOWER_CLIPY
HIGHER_CLIPY
LOWER_CLIPUV
HIGHER_CLIPUV
KEY_Y
KEY_U
KEY_V
Field
Field
When set to 1, new EVO features are enabled. When set to 0 (the hardware reset value), the
EVO behaves exactly like a TM1000 VO unit. Default: 0.
Activates full 8-bit alpha blending when set to 1. When set to 0, only the original five TM1000
blending levels are implemented (0%, 25%, 50%, 75%, 100%). Default: 0.
TM1000 default values (240 and 16 for Y, U and V) are used. Default: 0.
7.17.2, “Data-transfer
When set, VO_IO2 will generate frame synchronization signal that follows the field number in
SAV/EAV codes (Field1 gives a low VO_IO2, Field2 gives a high VO_IO2). Default: 0.
Activates Genlock mode when set to 1 and VO_CTL.SYNC_MASTER = 0. Default: 0.
When set, this bit activates chroma key. The overlay values (Y, U and V) are compared to the val-
ues stored in the EVO_KEY register. Bits that correspond to bits set in MASK_Y and MASK_UV
are ignored for the comparison. When there is an exact match between the pixel value and the
value in EVO_KEY register (less the bits selected by MASK_Y and MASK_UV), then the overlay
value is not present in the output stream, resulting in full transparency.
The key is 24 bits (Y, U and V are 8 bits each). Default: 0.
Table 7-6
0x855E,
525/60
Value
E191
This 4-bit value is used to mask the four lower bits of the overlay Y component during the
chroma key process. Example: Setting MASK_Y to ‘1’ will eliminate the influence of the
LSB of KEY_Y in the keying process.
This 4-bit value is used to mask the four lower bits of the overlay U and V components
during the chroma key process. Example: Setting MASK_UV to ‘1’ will eliminate the
influence of the LSB of KEY_U and KEY_V in the keying process.
A Y value lower or equal to LOWER_CLIPY is forced to LOWER_CLIPY. Default: 16.
A Y value higher or equal to HIGHER_CLIPY is forced to HIGHER_CLIPY. Default: 235.
An U or Y value less than or equal to LOWER_CLIPUV is forced to LOWER_CLIPUV.
Default: 16.
An U or and an V value higher than or equal to HIGHER_CLIPUV is forced to
HIGHER_CLIPUV. Default: 240.
Value compared to the Y component of the overlay for chroma keying.
Value compared to the U component of the overlay for chroma keying.
Value compared to the V component of the overlay for chroma keying.
Number of VO_CLK cycles of internal delay for VO_IO2 in Genlock mode.
for the RE-
625/50
0x855E,
Value
E191
Modes”. Default: 0.
Table 7-10. Timing register recommended values
PRODUCT SPECIFICATION
VO_FRAME FRAME_LENGTH
VO_FIELD
VO_LINE
VO_IMAGE
Register
Description
Description
FIELD_2_START
FRAME_PRESET
F1_VIDEO_LINE
F2_VIDEO_LINE
F1_OLAP
F2_OLAP
FRAME_WIDTH
VIDEO_PIXEL_START
IMAGE_HEIGHT
IMAGE_WIDTH
Field
Enhanced Video Out
525/60
Value
525
264
283
858
138
240
720
20
1
2
3
(704 visible)
Section
–2 (0xE)
625/50
Value
625
311
336
864
144
288
720
23
1
2
7-21