tm1300 NXP Semiconductors, tm1300 Datasheet - Page 311

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tm1300

Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
tm1300-1.2
Quantity:
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Philips Semiconductors
Dual clipped add of signed 16-bit halfwords
SYNTAX
FUNCTION
DESCRIPTION
pairs of high and low 16-bit halfwords of r src1 and r src2 . Both sums are clipped into the range [2
[0x7fff..0x8000]) and written into the corresponding halfwords of r dest . All values are signed 16-bit integers.
modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
r30 = 0x12340032, r40 = 0x00010002
r10 = 0, r30 = 0x12340032, r40 = 0x00010002
r20 = 1, r30 = 0x12340032, r40 = 0x00010002
r50 = 0x80000001, r80 = 0xffff7fff
r110 = 0x00017fff, r120 = 0x7fff7fff
As shown below, the
The
[ IF r guard ] dspidualadd r src1 r src2
if r guard then {
}
r src1
temp1
temp2
if temp1 < 0xffff8000 then temp1
if temp2 < 0xffff8000 then temp2
if temp1 > 0x7fff then temp1
if temp2 > 0x7fff then temp2
r dest <31:16>
r dest <15:0>
dspidualadd
3
sign_ext16to32(r src1 <15:0>) + sign_ext16to32(r src2 <15:0>)
sign_ext16to32(r src1 <31:16>) + sign_ext16to32(r src2 <31:16>)
signed
Initial Values
17-bit signed sums
temp1<15:0>
Two full-precision
temp2<15:0>
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
dspidualadd
1
r dest
0x7fff
0x7fff
1
0x8000
0x8000
3
Clip to [2
signed
operation computes two 16-bit clipped, signed sums separately on the two
signed
dspidualadd r30 r40
IF r10 dspidualadd r30 r40
IF r20 dspidualadd r30 r40
dspidualadd r50 r80
dspidualadd r110 r120
15
signed
–1 .. –2
0
15
]
0
r dest
1
1
PRODUCT SPECIFICATION
r src2
Operation
Clip to [2
3
signed
signed
15
–1 .. –2
signed
r60
r90
r125
DSPCPU Operations for TM1300
15
]
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
0
dspidualabs dspidualmul
r70
r100
dspidualsub dspiabs
1
dspidualadd
ATTRIBUTES
r60
no change, since guard is
false
r100
r90
r125
SEE ALSO
signed
0x12350034
0x80007fff
0x12350034
0x7fff7fff
Result
15
–1..–2
dspalu
1, 3
No
70
0
2
2
15
A-25
] (or

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