tm1300 NXP Semiconductors, tm1300 Datasheet - Page 95

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Figure 6-8. Format of CCIR656 SAV and EAV timing reference codes.
Figure 6-9. VI capture parameters.
VI_CTL.SC=1: ‘Interspersed sampling’ serves to gen-
erate a sampling structure in memory where chromi-
nance samples are spatially midway between luminance
samples, as shown in
mat is suitable for use in MPEG-1 encoding.
The VI hardware applies a (–1 13 5 –1)/16 filter as illus-
trated in
writing them to memory. This filter computes chromi-
nance values at sample points midway between lumi-
nance samples
01h if the filter result is less than 01h and clamped to FFh
if greater than FFh. Interspersed data format is preferred
by some video compression standards. The MPEG-1
standard, for example, requires YUV 4:2:0 data with
chrominance sampling positions horizontally and verti-
cally midway between luminance samples. This can be
achieved from the horizontally interspersed sampling for-
mat by vertical subsampling with a (1 1) / 2 or more so-
phisticated filter. Vertical filtering can be performed in
software using the DSPCPU’s efficient multimedia oper-
ations or by hardware in the on-chip ICP.
The filtering process exercises special care at the left
and right edges of the active area of the CCIR656 data
stream, as defined by the SAV, EAV code positions. See
Figure
el or to the right of the last pixel, filtering can result in ar-
tifacts. To minimize artifacts, the image is extended by
mirroring pixels around the left-most and right-most pixel.
Note that the image is mirrored around pixel ‘a’, the first
pixel after the SAV code and around pixel ‘zz’, the last
pixel before the EAV
1.
All filters perform full precision intermediate computa-
tions and saturation upon generating the result bits.
6-7. Since no pixels exist to the left of the first pix-
Figure 6-6
1
1 1 1 1 1 1 1 1
. Computed video data is clamped to
to the chrominance samples before
2
Figure
code. Pixel ‘a’ in
6-6. This ‘interspersed’ for-
0 0 0 0 0 0 0 0
Timing reference code
Pixel 0
Figure 6-7
START_X
Preamble
Captured Image
START_Y
is the
WIDTH
0 0 0 0 0 0 0 0
V = 1 during field blanking
(chroma, luma) pair defined by the first three camera
bytes of the UYVYUYVY... stream after SAV.
Refer to
mapped I/O (MMIO) registers that are used to control
and observe the operation of VI in fullres capture mode.
To ensure compatibility with future devices, any unde-
fined MMIO bits should be ignored when read and written
as’0’s.
Upon hardware or software reset
ware and Software
and VI_CLOCK registers are set to all zeros.
At any point in time, the VI_STATUS register fields (see
Figure
• CUR_X: The pixel index (0 to M–1) of the most
• CUR_Y: The line index (0 to N–1) within the current
PRODUCT SPECIFICATION
2.
3.
F = 0 during field 1
F = 1 during field 2
recently received camera pixel. CUR_X gets set to
zero for the first pixel following receipt of a SAV
code
received thereafter.
field of the camera line that is currently being
received. CUR_Y gets set to zero upon receipt of a
negative edge of V, i.e., upon the first SAV code con-
taining V=0 after one or more SAV codes containing
V=1. This is equivalent to the first line after the end of
vertical retrace. CUR_Y gets incremented upon
every successive SAV code.
Pixel M–1
EAV codes with multiple bit errors are accepted and en-
able the mirroring function.
Note that VI uses the SAV protection bits to implement
single error correction and double error detection. An
SAV code with double error is ignored.
V = 0 elsewhere
6-11) indicate the current camera status:
3
, and incremented on every valid Y sample
Line 0
Line N–1
Figure 6-11
1 F V H P P P P
Reset”), the VI_CTL, VI_STATUS,
for an overview of the memory
H = 0 for SAV
H = 1 for EAV
(Section 6.1.4, “Hard-
Protection bits
(error correction)
Video In
6-5