tm1300 NXP Semiconductors, tm1300 Datasheet - Page 467

• Manufacturer Part Number: tm1300
• Description: Tm-1300 Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
IEEE status flags from convert unsigned integer
to floating-point with rounding toward zero
SYNTAX
FUNCTION
DESCRIPTION
integer in r src1 to a single-precision IEEE floating-point value, and an integer bit vector representing the computed
exception flags is written into r dest . The bit vector stored in r dest has the same format as the IEEE exception bits in
the PCSW. The exception flags in PCSW are left unchanged by this operation. Rounding is performed toward zero;
the IEEE rounding mode bits in PCSW are ignored.
the modification of the destination register. If the LSB of r guard is 1, r dest is written; otherwise, r dest is not changed.
EXAMPLES
r30 = 3
r40 = 0xffffffff (4294967295)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
[ IF r guard ] ufloatrzflags r src1
if r guard then
r dest
ufloatrzflags
ufloatrzflags
31
0
Initial Values
ieee_flags((float) ((unsigned long)r src1 ))
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls
operation computes the IEEE exceptions that would result from converting the unsigned
ufloatrzflags r30
ufloatrzflags r40
IF r10 ufloatrzflags r50
IF r20 ufloatrzflags r50
ufloatrzflags r60
ufloatrzflags r70
ufloatrzflags r80
r dest
Operation
PRODUCT SPECIFICATION
7
0
r100
r105
r117
r120
r122
OFZ
6
IFZ
5
r110
r115
DSPCPU Operations for TM1300
INV
4
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ufloatflags ifloatrzflags
r100
r105
no change, since guard is false
r115
r117
r120
r122
OVF
ufloatrz ifloatflags
3
0
0x02 (INX)
0x02 (INX)
0x02 (INX)
0
0x02 (INX)
ufloatrzflags
UNF
ATTRIBUTES
2
SEE ALSO
Result
INX
1
DBZ
0
falu
120
1, 4
No
—
1
3
A-181