zl30407qcc Zarlink Semiconductor, zl30407qcc Datasheet - Page 17

• Manufacturer Part Number: zl30407qcc
• Description: Sonet/sdh Network Element Pll
• Manufacturer: Zarlink Semiconductor

All clocks and frame pulses (except the C155) are output with CMOS logic levels. The C155 clock (155.52 MHz) is
output in a standard LVDS format.
3.3.2
The ZL30407 provides three control registers dedicated to programming the output clock phase offset. Clocks
C16o, C8o, C4o and C2o and frame pulses F16o, F8o, F0o are derived from 16.384 MHz and can be jointly shifted
with respect to an active reference clock by up to 125 Ps with a step size of 61 ns. The required phase shift of
clocks is programmable by writing to the Phase Offset Register 2 ("Table 9") and to the Phase Offset Register 1
("Table 10"). The C1.5o clock can be shifted as well in step sizes of 81 ns by programming C1.5POA bits in Control
Register 3 ("Table 12").
The coarse phase adjustment is augmented with a very fine phase offset control on the order of 477 ps per step.
This fine adjustment is programmable by writing to the Fine Phase Offset Register (Table 16 "Fine Phase Offset
Register (R/W)"). The offset moves all clocks and frame pulses generated by ZL30407 including the C155 clock.
3.4
3.4.1
Any Network Element that operates in a synchronous network must support three Clock Modes: Free-run, Normal
(Locked) and Holdover. A network clock will usually operate in Normal mode. The Holdover and Free-run modes
are used to cope with impairments in the synchronization hierarchy. Requirements for Clock Modes are defined in
the international standards e.g.: G.813, GR-1244-CORE and GR-253-CORE and they are enforced by network
operators. The ZL30407 supports all clock modes and each of these modes have a corresponding state in the
Control State Machine.
3.4.2
The ZL30407 Control State Machine is a combination of many internal states supporting the three mandatory clock
modes. A simplified version of this state machine is shown in Figure 5; it includes the mandatory states: Free-run,
Normal and Holdover. These three states are complemented by two additional states: Reset and Auto Holdover,
which are critical to the ZL30407 operation under changing external conditions.
Control State Machine
Output Clocks Phase Adjustment
Clock Modes
ZL30407 State Machine
Figure 4 - C34/C44, C155o Clock Generation Options
0
1
11.184
C34/44 Output
8.592
E3DS3/OC3
0
44.736
34.368
1
Zarlink Semiconductor Inc.
ZL30407
17
155.52
active
C155 Output
E3DS3/OC3
0
disabled
1
Data Sheet