zl30407qcc Zarlink Semiconductor, zl30407qcc Datasheet - Page 19

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zl30407qcc

Manufacturer Part Number
zl30407qcc
Description
Sonet/sdh Network Element Pll
Manufacturer
Zarlink Semiconductor
Datasheet
3.4.2.4
The Holdover State is typically entered for short durations while network synchronization is temporarily disrupted. In
Holdover Mode, the ZL30407 generates clocks, which are not locked to an external reference signal but their
frequencies are based on stored coefficients in memory that were determined while the PLL was in Normal Mode
and locked to an external reference signal.
The initial frequency offset of the ZL30407 in Holdover Mode is 4x10
page 49 for details). This is more accurate than Telcordia’s GR-1244-CORE Stratum 3E requirement of +1x10
Once the ZL30407 has transitioned into Holdover Mode, holdover stability is determined by the stability of the 20
MHz Master Clock Oscillator. Selection of the oscillator requires close examination of the crystal oscillator
temperature sensitivity and frequency drift caused by aging.
3.4.2.5
The Auto Holdover state is a transitional state that the ZL30407 enters automatically when the active reference fails
unexpectedly. When the ZL30407 detects loss of reference it sets the HOLDOVER status bit and waits in Auto
Holdover state until the failed reference recovers. Recovery from Auto Holdover for 8 kHz, 1.544 MHz, 2.048 MHz
and 19.44 MHz reference clocks is fully automatic, however recovery for an 8 kHz reference clock requires
additional transitioning through the Holdover state to guarantee compliance with network synchronization standards
(for details see Section 5.1.3 on page 36 and Section 5.1.2 on page 35). The HOLDOVER status may alert the
control processor about the failure and in response the control processor may switch to the secondary reference
clock. The Auto Holdover and Holdover States are internally combined together and they are output as a
HOLDOVER status on pin 55 and bit 4 in Status Register 1 (Table 7 on page 26).
In less demanding clocking arrangements (e.g. Line Cards), the ZL30407 can be configured to operate in the
Hardware Control mode which does not require a microprocessor. Under the Hardware Control mode the ZL30407
maintains most of its State Machine functionality as is shown in Figure 6.
RESET = 1
RESET
Holdover State (Holdover Mode)
Auto Holdover State
unconditional return from
MS2,MS1 = 10 forces
any state to Free-run
Figure 6 - ZL30407 State Machine in Hardware Control configuration
FREE-
RUN
10
MS2,MS1 = 00
MS2,MS1 = 01
OR
MS2,MS1 = 01 OR
RefSel change
OVER
HOLD-
01
Zarlink Semiconductor Inc.
MS2,MS1 = 00
Ref: OK AND
ZL30407
{AUTO}
19
RefSel Change
MS2,MS1 = 01
NORMAL
00
OR
Ref: OK-->FAIL AND
MS2,MS1 = 00
-12
{AUTO}
(see table Performance Characteristics* on
HOLD-
OVER
AUTO
Ref: FAIL-->OK AND
MS2,MS1 = 00 AND
{AUTO}
Data Sheet
-9
.

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