zl30407qcc Zarlink Semiconductor, zl30407qcc Datasheet - Page 39

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zl30407qcc

Manufacturer Part Number
zl30407qcc
Description
Sonet/sdh Network Element Pll
Manufacturer
Zarlink Semiconductor
Datasheet
5.2
Carrier Class Telecommunications Equipment deployed in today’s networks guarantee better than 99.999%
operational availability (equivalent to less than 7 minutes of downtime per year). This high level of uninterrupted
service is achieved by fully redundant architectures with hot swappable cards. Timing for these types of systems
can be generated by the ZL30407 which supports Master/Slave Timing Protection Switching shown in Figure 14.
The redundant architecture shown in this figure is based on the ZL30407 being deployed on two separate timing
cards; the Master Timing Card and the Slave Timing Card. In normal operation the Master Timing Card receives
synchronization from the network and provides timing for the whole system. All Line Cards in the system are
configured to receive from the backplane a reference clock generated by the Master Timing Card. The redundant
Slave Timing Card is phase locked (through the R3 input) to one of the backplane clocks supplied by the Master
Timing Card. The ZL30407 on the Slave Timing Card is programmed for 12 Hz loop filter operation (FCS2 = 1,
FCS = 0) which allows it to track the Master Timing Card clocks with minimal phase error.
When the Master Timing card fails unexpectedly (this failure is not related to reference failure) then all Line Cards
will detect this failure and they will switch to the timing supplied by the Slave Timing Card. At this moment the
ZL30407 on the Slave Timing Card must be switched from 12 Hz to the same loop filter characteristic (e.g. 1.5 Hz
filter for SDH networks) as the Master Timing Card.
A detailed description of this Master/Slave redundant timing architecture based on ZL30407 can be found in
Application Note ZLAN-67 “Applications of the ZL30407 Master/Slave Application”.
Master/Slave Timing Protection Switching
Timing Card (in Master slot)
Timing Card (in Slave slot)
Figure 14 - Block Diagram of the Master/Slave Timing Protection Switching
R0
R1
R0
R1
SEC
SEC
PRI
PRI
ZL30407
ZL30407
Zarlink Semiconductor Inc.
ZL30407
Backplane
39
Line Card #m
Line Card #n
SEC
SEC
PRI
PRI
ZL30410
ZL30410
E3/DS3 MUX
with Framers
SONET/SDH
Framer
Data Sheet

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