ATMEGA406-1AAU Atmel, ATMEGA406-1AAU Datasheet - Page 197

IC AVR MCU 40K 1MHZ 48LQFP

ATMEGA406-1AAU

Manufacturer Part Number
ATMEGA406-1AAU
Description
IC AVR MCU 40K 1MHZ 48LQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA406-1AAU

Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
I²C
Peripherals
POR, WDT
Number Of I /o
18
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 25 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-30°C ~ 85°C
Package / Case
48-LQFP
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire
Maximum Clock Frequency
1 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 30 C
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
1MHz
Total Internal Ram Size
2KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5/9/12/15/18/24V
Operating Supply Voltage (max)
25V
Operating Supply Voltage (min)
4V
On-chip Adc
10-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-30C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Controller Family/series
AVR MEGA
No. Of I/o's
18
Eeprom Memory Size
512Byte
Ram Memory Size
2KB
Cpu Speed
1MHz
Rohs Compliant
Yes
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA406-1AAU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA406-1AAU
Manufacturer:
AT
Quantity:
20 000
28.2.2
28.2.3
2548E–AVR–07/06
Low Byte
Latching of Fuses
Table 28-4.
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The fuse values are latched when the device enters programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
the EESAVE Fuse which will take effect once it is programmed. The fuses are also latched on
Power-up in Normal mode.
Fuse Low Byte
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
SUT1
SUT0
CKSEL
1. The default value of SUT1:0 results in maximum start-up time for the default clock source. See
2. The default value of BOOTSZ1:0 results in maximum Boot Size. See
3. See
4. When unpgrogrammed, Internal RC Oscillator is used. Programming this fuse is for test pur-
(3)
Table 7-2 on page 28
for details.
pose only, and should not be used in application.
Fuse Low Byte
”WDTCSR – Watchdog Timer Control Register” on page 47
Bit No
7
6
5
4
3
2
1
0
Description
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
page 193
Select Boot Size (see
page 193
Select Reset Vector
Select start-up time
Select start-up time
Clock Selection
for details.
for details)
for details)
Table 27-7 on
Table 27-7 on
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
Default Value
1 (unprogrammed, EEPROM
not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
for details.
ATmega406
Table 27-7 on page 193
(2)
(2)
(1)
(1)
(4)
197

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