ATMEGA406-1AAU Atmel, ATMEGA406-1AAU Datasheet - Page 215

• Manufacturer Part Number: ATMEGA406-1AAU
• Description: IC AVR MCU 40K 1MHZ 48LQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA406-1AAU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: I²C
• Peripherals: POR, WDT
• Number Of I /o: 18
• Program Memory Size: 40KB (20K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire
• Maximum Clock Frequency: 1 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 30 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 1MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5/9/12/15/18/24V
• Operating Supply Voltage (max): 25V
• Operating Supply Voltage (min): 4V
• On-chip Adc: 10-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -30C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 18
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 1MHz
• Rohs Compliant: Yes
• For Use With: 770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 28-12. JTAG Programming Instruction
2548E–AVR–07/06
Instruction
1a. Chip Erase
1b. Poll for Chip Erase Complete
2a. Enter Flash Write
2b. Load Address High Byte
2c. Load Address Low Byte
2d. Load Data Low Byte
2e. Load Data High Byte
2f. Latch Data
2g. Write Flash Page
2h. Poll for Page Write Complete
3a. Enter Flash Read
3b. Load Address High Byte
3c. Load Address Low Byte
Set
a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x = don’t care
Figure 28-12. Programming Command Register
TDI Sequence
0100011_10000000
0110001_10000000
0110011_10000000
0110011_10000000
0110011_10000000
0100011_00010000
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0010111_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0100011_00000010
0000111_aaaaaaaa
0000011_bbbbbbbb
0110111_00000000
TDO
TDI
S
R
O
B
E
S
A
D
D
R
E
S
S
D
A
A
T
T
/
EEPROM
Lock Bits
TDO Sequence
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Fuses
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Flash
ATmega406
Notes
(2)
(9)
(1)
(1)
(2)
(9)
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